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SN74LS193

PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

TheSN54/74LS192isanUP/DOWNBCDDecade(8421)CounterandtheSN54/74LS193isanUP/DOWNMODULO-16BinaryCounter.SeparateCountUpandCountDownClocksareusedandineithercountingmodethecircuitsoperatesynchronously.TheoutputschangestatesynchronouswiththeLOW-to-HIGHtransitions

SN74LS193

具有雙時(shí)鐘和清零功能的同步 4 位加/減二進(jìn)制計(jì)數(shù)器; ? Cascading Circuitry Provided Internally\n? Synchronous Operation\n? Individual Preset to Each Flip-Flop\n? Fully Independent Clear Input;

These monolithic circuits are synchronous reversible (up/down) counters having a complexity of 55 equivalent gates. The '192 and 'LS192 circuits are BCD counters and the '193 and 'LS193 are 4-bit binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidently with each other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes which are normally associated with asynchronous (ripple-clock) counters. The outputs of the four master-slave flip-flops are triggered by a low-to-high-level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is high. All four counters are fully programmable; that is, each output may be preset to either level by entering the desired data at the data inputs while the load input is low. The output will change to agree with the data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. A clear input has been provided which forces all outputs to the low level when a high level is applied. The clear function is independent of the count and load inputs. The clear, count, and load inputs are buffered to lower the drive requirements. This reduces the number of clock drivers etc., required for long words. These counters are designed to be cascaded without the need for external circuitry. Both borrow and carry outputs are available to cascade both the up- and down-counting functions. The borrow output produces a pulse equal in width to the count-down input when the counter underflows. Similarly, the carry output produces a pulse equal in width to the count-up input when an overflow condition exists. The counters can then be easily cascaded by feeding the borrow and carry outputs to the count-down and count-up inputs respectively of the succeeding counter. \n

SN74LS193D

PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

TheSN54/74LS192isanUP/DOWNBCDDecade(8421)CounterandtheSN54/74LS193isanUP/DOWNMODULO-16BinaryCounter.SeparateCountUpandCountDownClocksareusedandineithercountingmodethecircuitsoperatesynchronously.TheoutputschangestatesynchronouswiththeLOW-to-HIGHtransitions

SN74LS193ML2

Presettable 4-Bit Binary Up/down Counter;

Presettable 4-Bit Binary Up/down CounterThe SN74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and the circuits can operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs.\nSeparate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a subsequent stages without extra logic, thus simplifying multistage counter designs. Individual preset inputs allow the circuits to be used as programmable counters. Both the Parallel Load (PL) and the Master Reset (MR) inputs asynchronously override the clocks.? Low Power . . . 95 mW Typical Dissipation\n? High Speed . . . 40 MHz Typical Count Frequency\n? Synchronous Counting\n? Asynchronous Master Reset and Parallel Load\n? Individual Preset Inputs\n? Cascading Circuitry Internally Provided\n? Input Clamp Diodes Limit High Speed Termination Effects

SN74LS193N

PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER

TheSN54/74LS192isanUP/DOWNBCDDecade(8421)CounterandtheSN54/74LS193isanUP/DOWNMODULO-16BinaryCounter.SeparateCountUpandCountDownClocksareusedandineithercountingmodethecircuitsoperatesynchronously.TheoutputschangestatesynchronouswiththeLOW-to-HIGHtransitions

SN74LS194

LOW POWER SCHOTTKY

 TheSN74LS194AisaHighSpeed4-BitBidirectionalUniversal ShiftRegister.Asahighspeedmultifunctionalsequentialbuildingblock,itisusefulinawidevarietyofapplications.Itmaybeusedinserial-serial,shiftleft,shiftright,serial-par

SN74LS194A

LOW POWER SCHOTTKY

 TheSN74LS194AisaHighSpeed4-BitBidirectionalUniversal ShiftRegister.Asahighspeedmultifunctionalsequentialbuildingblock,itisusefulinawidevarietyofapplications.Itmaybeusedinserial-serial,shiftleft,shiftright,serial-par

SN74LS194AD

LOW POWER SCHOTTKY

 TheSN74LS194AisaHighSpeed4-BitBidirectionalUniversal ShiftRegister.Asahighspeedmultifunctionalsequentialbuildingblock,itisusefulinawidevarietyofapplications.Itmaybeusedinserial-serial,shiftleft,shiftright,serial-par

SN74LS194AD

4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS

ParallelInputsandOutputs FourOperatingModes: SynchronousParallelLoad RightShift LeftShift DoNothing PasitiveEdge-TriggeredClocking DirectOverridingClear

SN74LS194AD.A

4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS

ParallelInputsandOutputs FourOperatingModes: SynchronousParallelLoad RightShift LeftShift DoNothing PasitiveEdge-TriggeredClocking DirectOverridingClear