SN74HCS72QPWRQ1屬于集成電路（IC）的觸發(fā)器。由美國德州儀器公司制造生產的SN74HCS72QPWRQ1觸發(fā)器觸發(fā)器是能夠存儲單個邏輯狀態(tài)或信息“位”的基本數(shù)字存儲器件。這些器件至少有兩個輸入；一個或多個用于傳遞要存儲的數(shù)據(jù)，另一個用于指示存儲該數(shù)據(jù)的時間點。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復位）和 JK，對提供給其輸入的信號有不同的響應，可用于實現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時鐘信號時才會改變。

1 Features

1? AEC-Q100 Qualified for automotive applications:

– Device temperature grade 1: –40°C to +125°C,

TA

– Device HBM ESD Classification Level 2

– Device CDM ESD Classifcation Level C6

? Wide operating voltage range: 2 V to 6 V

? Schmitt-trigger inputs allow for slow or noisy input

signals

? Low power consumption

– Typical ICC of 100 nA

– Typical input leakage current of ±100 nA

? ±7.8-mA output drive at 5 V

2 Applications

? Convert a momentary switch to a toggle switch

? Input slow edge-rate signals

? Operate in noisy environments

? Enable CAN Controller Power with wake-up

pattern

3 Description

This device contains two independent D-type

negative-edge-triggered flip-flops. All inputs include

Schmitt-triggers, allowing for slow or noisy input

signals. A low level at the preset (PRE) input sets the

output high. A low level at the clear (CLR) input

resets the output low. Preset and clear functions are

asynchronous and not dependent on the levels of the

other inputs. When PRE and CLR are inactive (high),

data at the data (D) input meeting the setup time

requirements is transferred to the outputs (Q, Q) on

the negative-going edge of the clock (CLK) pulse.

Following the hold-time interval, data at the data (D)

input can be changed without affecting the levels at

the outputs (Q, Q).