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SN74HCS596

8 位串行輸入/并行輸出移位寄存器; ? Wide operating voltage range: 2 V to 6 V\n? Schmitt-trigger inputs allow for slow or noisy input signals\n? Low power consumption \n? Typical ICC of 100 nA\n? Typical input leakage current of ±100 nA\n \n? ±7.8-mA output drive at 6 V\n? Extended ambient temperature range: –40°C to +125°C, TA;

The SN74HCS596 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH?) for cascading. When the output-enable (OE) input is high, the outputs are in a highimpedance state. Internal register data is not impacted by the operation of the OE input.

SN74HCS596

SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596-Q1

汽車類 8 位串行輸入/并行輸出移位寄存器; ? AEC-Q100 Qualified for automotive applications: \n? Device temperature grade 1: –40°C to +125°C, TA \n? Device HBM ESD Classification Level 2\n? Device CDM ESD Classifcation Level C6\n \n? Wide operating voltage range: 2 V to 6 V\n? Schmitt-trigger inputs allow for slow or noisy input signals\n? Low power consumption \n? Typical ICC of 100 nA\n? Typical input leakage current of ±100 nA\n \n? ±7.8-mA output drive at 6 V;

The SN74HCS596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH?) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of the OE input.

SN74HCS596D

SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596DR

SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596PW

SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596PWR

絲印：HCS596；Package：TSSOP；SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596-Q1

SN74HCS596-Q1 Automotive 8-Bit Shift Register With Schmitt-Trigger Inputs and Opendrain Output Registers

SN74HCS596-Q1

SN74HCS596 8-Bit Shift Register With Schmitt-Trigger Inputs and Open-Drain Output Registers

SN74HCS596QDRQ1

絲?。?a target="_blank" title="Marking" href="/hcs596q/marking.html">HCS596Q；Package：TSSOP；SN74HCS596-Q1 Automotive 8-Bit Shift Register With Schmitt-Trigger Inputs and Opendrain Output Registers