SN74F574DW屬于集成電路（IC）的觸發(fā)器。由美國(guó)德州儀器公司制造生產(chǎn)的SN74F574DW觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù)，另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類(lèi)型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對(duì)提供給其輸入的信號(hào)有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。

Eight D-Type Flip-Flops in a Single

Package

3-State Bus-Driving True Outputs

Full Parallel Access for Loading

Buffered Control Inputs

Package Options Include Plastic

Small-Outline Packages and Standard

Plastic 300-mil DIPs

description

This 8-bit flip-flop features 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. It is particularly

suitable for implementing buffer registers, I/O

ports, bidirectional bus drivers, and working

registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock

(CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without need for interface or pullup components.

The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new

data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0°C to 70°C.