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首頁(yè)>SN74CBT3345CDBQR.B>規(guī)格書詳情

SN74CBT3345CDBQR.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

SN74CBT3345CDBQR.B
廠商型號(hào)

SN74CBT3345CDBQR.B

功能描述

8-BIT FET BUS SWITCH 5-V BUS SWITCH WITH —-2-V UNDERSHOOT PROTECTION

絲印標(biāo)識(shí)

CBT3345C

封裝外殼

SSOP

文件大小

755.95 Kbytes

頁(yè)面數(shù)量

19 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI2德州儀器

中文名稱

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-5 22:58:00

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SN74CBT3345CDBQR.B價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨

SN74CBT3345CDBQR.B規(guī)格書詳情

Undershoot Protection for Off-Isolation on

A and B Ports Up To ?2 V

Bidirectional Data Flow, With Near-Zero

Propagation Delay

Low ON-State Resistance (ron)

Characteristics (ron = 3 Ω Typical)

Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

(Cio(OFF) = 5.5 pF Typical)

Data and Control Inputs Provide

Undershoot Clamp Diodes

Low Power Consumption

(ICC = 3 μA Max)

VCC Operating Range From 4 V to 5.5 V

Data I/Os Support 0 to 5-V Signaling Levels

(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

Control Inputs Can Be Driven by TTL or

5-V/3.3-V CMOS Outputs

Ioff Supports Partial-Power-Down Mode

Operation

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

ESD Performance Tested Per JESD 22

? 2000-V Human-Body Model

(A114-B, Class II)

? 1000-V Charged-Device Model (C101)

Supports Both Digital and Analog

Applications: USB Interface, Memory

Interleaving, Bus Isolation, Low-Distortion

Signal Gating

description/ordering information

The SN74CBT3345C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron),

allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the

SN74CBT3345C provides protection for undershoot up to ?2 V by sensing an undershoot event and ensuring

that the switch remains in the proper OFF state.

The SN74CBT3345C is organized as an 8-bit bus switch with two output-enable (OE, OE) inputs. When OE

is high or OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data

flow between ports. When OE is low and OE is high, the bus switch is OFF and the high-impedance state exists

between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that

damaging current will not backflow through the device when it is powered down. The device has isolation during

power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor, and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is

determined by the current-sinking/current-sourcing capability of the driver.

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