SN74CB3Q6800PWR屬于集成電路（IC）的信號開關(guān)多路復(fù)用器解碼器。由美國德州儀器公司制造生產(chǎn)的SN74CB3Q6800PWR信號開關(guān)，多路復(fù)用器，解碼器邏輯型信號開關(guān)、多路復(fù)用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據(jù)的電信號進行路由和選擇。這些器件與設(shè)計用于模擬信號的類似產(chǎn)品有所不同，它們保留的信息表示為兩個電狀態(tài)之一，而不是兩個外部界限內(nèi)的無窮變化量。

FEATURES

· High-Bandwidth Data Path (Up To 500 MHz (1))

· 5-V Tolerant I/Os With Device Powered Up or

Powered Down

· Low and Flat ON-State Resistance (ron)

Characteristics Over Operating Range

(ron = 4.5 W Typ)

· Rail-to-Rail Switching on Data I/O Ports

– 0- to 5-V Switching With 3.3-V VCC

– 0- to 3.3-V Switching With 2.5-V VCC

· B-Port Outputs Are Precharged by Bias

Voltage (BIASV) to Minimize Signal Distortion

During Live Insertion and Hot Plugging

· Supports PCI Hot Plug

· Bidirectional Data Flow With Near-Zero

Propagation Delay

· Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

(Cio(OFF) = 3.5 pF Typ)

· Fast Switching Frequency (fON= 20 MHz Max)

· Data and Control Inputs Provide Undershoot

Clamp Diodes

· Low Power Consumption (ICC = 0.75 mA Typ)

· VCC Operating Range From 2.3 V to 3.6 V

· Data I/Os Support 0- to 5-V Signaling Levels

(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)

· Control Inputs Can Be Driven by TTL or

5-V/3.3-V CMOS Outputs

· Ioff Supports Partial-Power-Down Mode

Operation

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

· ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

· Supports Both Digital and Analog

Applications: PCI Interface, Differential Signal

Interface, Memory Interleaving, Bus Isolation,

Low-Distortion Signal Gating

DESCRIPTION/ORDERING INFORMATION

The SN74CB3Q6800 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of

the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows

for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device

also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.

Specifically designed to support high-bandwidth applications, the SN74CB3Q6800 provides an optimized

interface solution ideally suited for broadband communications, networking, and data-intensive computing

systems.

The SN74CB3Q6800 is a 10-bit bus switch with a single output-enable (ON) input. When ON is low, the 10-bit

bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When

ON is high, the 10-bit bus switch is OFF and a high-impedance state exists between the A and B ports. The B

port is precharged to bias voltage (BIASV) through the equivalent of a 10-kW resistor when ON is high, or if the

device is powered down (VCC = 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card's output voltage may be close to

GND. When the connector pins make contact, the card's parasitic capacitance tries to force the bus signal to

GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with

precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on

the active bus. This method ensures that any glitch produced by insertion (or removal) of the card does not cross

the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging

current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, ON should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.