SN74BCT8245ADWR屬于集成電路（IC）的專用邏輯器件。由美國德州儀器公司制造生產(chǎn)的SN74BCT8245ADWR專用邏輯器件專用邏輯 IC 設(shè)計(jì)提供應(yīng)用特定的邏輯輸出類型，例如 BCD 速率倍增、可尋址掃描端口、總線終端陣列、CML 驅(qū)動(dòng)器、比較器、ABT 掃描測(cè)試、二進(jìn)制全加法器、互補(bǔ)對(duì)加逆變器、可配置緩沖器、觸點(diǎn)顫動(dòng)消除器、晶體振蕩器、延遲元件、差分接收器、LVTTL 到 GTLP 收發(fā)器、存儲(chǔ)器解碼器、電源良好檢測(cè)器和分頻器。

Members of the Texas Instruments

SCOPE ? Family of Testability Products

Octal Test-Integrated Circuits

Functionally Equivalent to ’F245 and

BCT245 in the Normal- Function Mode

Compatible With the IEEE Standard

1149.1-1990 (JTAG) Test Access Port and

Boundary-Scan Architecture

Test Operation Synchronous to Test

Access Port (TAP)

Implement Optional Test Reset Signal by

Recognizing a Double-High-Level Voltage

(10 V) on TMS Pin

SCOPE ? Instruction Set

? IEEE Standard 1149.1-1990 Required

Instructions, Optional INTEST, CLAMP,

and HIGHZ

? Parallel-Signature Analysis at Inputs

? Pseudo-Random Pattern Generation

From Outputs

? Sample Inputs/Toggle Outputs

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic

and Ceramic 300-mil DIPs (JT, NT)

description

The ’BCT8245A scan test devices with octal bus

transceivers are members of the Texas

Instruments SCOPE? testability integratedcircuit

family. This family of devices supports IEEE

Standard 1149.1-1990 boundary scan to facilitate

testing of complex circuit-board assemblies. Scan

access to the test circuitry is accomplished via the

4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the ’F245 and ’BCT245 octal bus transceivers.

The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device

terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect

the functional operation of the SCOPE? octal bus transceivers.

In the test mode, the normal operation of the SCOPE? octal bus transceivers is inhibited and the test circuitry

is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform

boundary-scan test operations as described in IEEE Standard 1149.1-1990.