SN74AUP2G79RSER屬于集成電路（IC）的觸發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74AUP2G79RSER觸發(fā)器觸發(fā)器是能夠存儲(chǔ)單個(gè)邏輯狀態(tài)或信息“位”的基本數(shù)字存儲(chǔ)器件。這些器件至少有兩個(gè)輸入；一個(gè)或多個(gè)用于傳遞要存儲(chǔ)的數(shù)據(jù)，另一個(gè)用于指示存儲(chǔ)該數(shù)據(jù)的時(shí)間點(diǎn)。不同的觸發(fā)器類型，例如 D（延遲）、SR（置位復(fù)位）和 JK，對(duì)提供給其輸入的信號(hào)有不同的響應(yīng)，可用于實(shí)現(xiàn)不同的邏輯功能。這些器件與鎖存器的不同之處在于它們是邊緣敏感器件，其保持的邏輯狀態(tài)僅在接收到有效時(shí)鐘信號(hào)時(shí)才會(huì)改變。

1FEATURES

2? Available in the Texas Instruments NanoStar?

Package

? Low Static-Power Consumption

(ICC = 0.9 μA Maximum)

? Low Dynamic-Power Consumption

(Cpd = 3 pF Typ at 3.3 V)

? Low Input Capacitance (Ci = 1.5 pF Typical)

? Low Noise – Overshoot and Undershoot

<10% of VCC

? Ioff Supports Partial-Power-Down Mode

Operation

? Wide Operating VCC Range of 0.8 V to 3.6 V

? Optimized for 3.3-V Operation

? 3.6-V I/O Tolerant to Support Mixed-Mode

Signal Operation

? tpd = 4 ns Maximum at 3.3 V

? Suitable for Point-to-Point Applications

? Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

? ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

DESCRIPTION/ORDERING INFORMATION

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable

applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range

of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal

integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting

the levels at the outputs.

NanoStar? package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.