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首頁(yè)>SN74AUP1T86DCKRG4.B>規(guī)格書詳情

SN74AUP1T86DCKRG4.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

SN74AUP1T86DCKRG4.B
廠商型號(hào)

SN74AUP1T86DCKRG4.B

功能描述

LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, 2-INPUT EXCLUSIVE-OR GATE

絲印標(biāo)識(shí)

6HF

封裝外殼

SC70

文件大小

520.65 Kbytes

頁(yè)面數(shù)量

18 頁(yè)

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-12 23:01:00

人工找貨

SN74AUP1T86DCKRG4.B價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨

SN74AUP1T86DCKRG4.B規(guī)格書詳情

1FEATURES

? Single-Supply Voltage Translator

? Output Level Up to Supply VCC CMOS Level

– 1.8 V to 3.3 V (at VCC = 3.3 V)

– 2.5 V to 3.3 V (at VCC = 3.3 V)

– 1.8 V to 2.5 V (at V CC = 2.5 V)

– 3.3 V to 2.5 V (at V CC = 2.5 V

? Schmitt-Trigger Inputs Reject Input Noise and

Provide Better Output Signal Integrity

? Ioff Supports Partial Power Down (VCC = 0 V)

? Very Low Static Power Consumption:

0.1 μA

? Very Low Dynamic Power Consumption:

0.9 μA

? Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

? Pb-Free Packages Available: SC-70 (DCK)

2 x 2.1 x 0.65 mm (Height 1.1 mm)

? More Gate Options Available at

www.ti.com/littlelogic

? ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model

(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

Y = A ? B or Y = AB + AB

DESCRIPTION/ORDERING INFORMATION

The SN74AUP1T86 performs the Boolean function with designation for logic-level

translation applications with output referenced to supply VCC.

AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in

operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V

VCC supply. This product also maintains excellent signal integrity (see Figure 1 and Figure 2).

The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external

controllers or processors.

Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise

immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger

inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile

applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of

the device. No damage occurs to the device under these conditions.

The SN74AUP1T86 is designed with optimized current-drive capability of 4 mA to reduce line reflections,

overshoot, and undershoot caused by high-drive outputs.

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TI/德州儀器
24+
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1901
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10000
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TI(德州儀器)
23+
NA
20094
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23+
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8080
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6000
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6523
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25+
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23+
SC-70-5
9600
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TI/德州儀器
2023+
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1251
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