SN74AS194屬于集成電路（IC）的移位寄存器。由美國德州儀器公司制造生產(chǎn)的SN74AS194移位寄存器移位寄存器是低級邏輯器件，通常用于在串行和并行方式之間轉(zhuǎn)換數(shù)字邏輯信號形式的數(shù)據(jù)，或在數(shù)字字內(nèi)移動數(shù)據(jù)位的位置。移位寄存器通常使用集成到一個設(shè)備中的一組觸發(fā)器來實現(xiàn)，常用于集成度更高的邏輯器件，但仍可用于 I/O 擴展等應(yīng)用，在這些應(yīng)用中離散形式的函數(shù)可能會非常有用。

Parallel-to-Serial, Serial-to-Parallel

Conversions

Left or Right Shifts

Parallel Synchronous Loading

Direct Overriding Clear

Temporary Data-Latching Capability

Package Options Include Plastic

Small-Outline Packages (D), Ceramic Chip

Carriers (FK), and Standard Plastic (N) and

Ceramic (J) 300-mil DIPs

description

These 4-bit bidirectional universal shift registers

feature parallel outputs, right-shift and left-shift

serial (SR SER, SL SER) inputs, operatingmode-

control (S0, S1) inputs, and a direct

overriding clear (CLR) line. The registers have

four distinct modes of operation:

? Inhibit clock (temporary data latch/do nothing)

? Shift right (in the direction QA toward QD)

? Shift left (in the direction QD toward QA)

? Parallel (broadside) load

Parallel synchronous loading is accomplished by

applying the four bits of data and taking both S0

and S1 high. The data is loaded into the

associated flip-flops and appears at the outputs

after the positive transition of the clock (CLK)

input. During loading, serial data flow is inhibited.

Shift right is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low.

Serial data for this mode is entered at the shift-right data input. When S0 is low and S1 is high, data shifts left

synchronously and new data is entered at the shift-left serial inputs. Clocking of the flip-flop is inhibited when

both mode-control inputs are low.

The SN54AS194 is characterized for operation over the full military temperature range of ?55°C to 125°C. The

SN74AS194 is characterized for operation from 0°C to 70°C.