SN74ALVCH245NSR屬于集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74ALVCH245NSR緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對某個(gè)電路的邏輯信號(hào)的訪問，以用于另一電路。緩沖器將其輸入信號(hào)（不變或反相）傳遞到其輸出，并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

FEATURES

· Operates From 1.65 V to 3.6 V

· Max tpd of 3.4 ns at 3.3 V

· ±24-mA Output Drive at 3.3 V

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

DESCRIPTION/ORDERING INFORMATION

This octal bus transceiver is designed for 1.65-V to

3.6-V VCC operation.

The SN74ALVCH245 is designed for asynchronous

communication between data buses. The device

transmits data from the A bus to the B bus or from

the B bus to the A bus, depending on the logic level

at the direction-control (DIR) input. The output-enable

(OE) input can be used to disable the device so the

buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.