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SN74ALVCH16270DLR.B中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
SN74ALVCH16270DLR.B |
功能描述 | 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS |
絲印標(biāo)識 | |
封裝外殼 | SSOP |
文件大小 |
275.06 Kbytes |
頁面數(shù)量 |
15 頁 |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡稱 |
TI2【德州儀器】 |
中文名稱 | 美國德州儀器公司官網(wǎng) |
原廠標(biāo)識 | TI2 |
數(shù)據(jù)手冊 | |
更新時間 | 2025-8-1 23:00:00 |
人工找貨 | SN74ALVCH16270DLR.B價格和庫存,歡迎聯(lián)系客服免費人工找貨 |
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SN74ALVCH16270DLR.B規(guī)格書詳情
FEATURES
· Member of the Texas Instruments Widebus?
Family
· EPIC? (Enhanced-Performance Implanted
CMOS) Submicron Process
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
· Latch-Up Performance Exceeds 250 mA Per
JESD 17
· Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
DESCRIPTION
This 12-bit to 24-bit registered bus exchanger is
designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16270 is used in applications in
which data must be transferred from a narrow
high-speed bus to a wide lower-frequency bus.
The device provides synchronous data exchange
between the two ports. Data is stored in the internal
registers on the low-to-high transition of the clock
(CLK) input when the appropriate CLKEN inputs are
low. The select (SEL) line selects 1B or 2B data for
the A outputs. For data transfer in the A-to-B
direction, a two-stage pipeline is provided in the
A-to-1B path, with a single storage register in the
A-to-2B path. Proper control of the CLKENA inputs
allows two sequential 12-bit words to be presented
synchronously as a 24-bit word on the B port. Data
flow is controlled by the active-low output enables
(OEA, OEB). The control terminals are registered to
synchronize the bus-direction changes with CLK.
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined prior to the arrival of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16270 is characterized for operation from -40°C to 85°C.
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
TI(德州儀器) |
24+ |
TSSOP566.1mm |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費送樣,原廠技術(shù)支持!!! |
詢價 | ||
TI/德州儀器 |
24+ |
NA/ |
1009 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價 | ||
TI |
2016+ |
TSSOP |
6523 |
房間原裝進口現(xiàn)貨假一賠十 |
詢價 | ||
TI |
23+ |
TSSOP56 |
188 |
原裝房間現(xiàn)貨假一賠十 |
詢價 | ||
TI |
24+ |
SSOP56 |
498 |
只做原裝,歡迎詢價,量大價優(yōu) |
詢價 | ||
TI |
25+ |
TSSOP56 |
4500 |
全新原裝、誠信經(jīng)營、公司現(xiàn)貨銷售! |
詢價 | ||
SN74ALVCH16271DGGR |
902 |
902 |
詢價 | ||||
TI/德州儀器 |
25+ |
原廠封裝 |
10280 |
原廠授權(quán)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源! |
詢價 | ||
TI |
2025+ |
TSSOP-56 |
16000 |
原裝優(yōu)勢絕對有貨 |
詢價 | ||
TI |
24+ |
TSSOP-48P |
289 |
詢價 |