SN74ALVCH16245DLR屬于集成電路（IC）的緩沖器驅動器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74ALVCH16245DLR緩沖器，驅動器，接收器，收發(fā)器邏輯緩沖器、驅動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。

1 Features

1? Member of the Texas Instruments Widebus?

Family

? Operates From 1.65 V to 3.6 V

? Max t pd of 3 ns at 3.3 V

? ±24-mA Output Drive at 3.3 V

? Bus Hold on Data Inputs Eliminates the Need for

External Pullup or Pulldown Resistors

? Latch-Up Performance Exceeds 250 mA Per

JESD 17

? ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

2 Applications

? Cable Modem Termination Systems

? Servers

? LED Displays

? Network Switches

? Telecom Infrastructure

? Motor Drivers

? I/O Expanders

3 Description

This 16-bit (dual-octal) noninverting bus transceiver is

designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16245 device is designed for

asynchronous communication between two data

buses. The logic levels of the direction-control (DIR)

input and the output-enable (OE) input activate either

the B-port outputs or the A-port outputs or place both

output ports into the high-impedance mode. The

device transmits data from the A bus to the B bus

when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are

activated. The input circuitry on both A and B ports is

always active and must have a logic high or low level

applied to prevent excess ICC and ICCZ.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through a

pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the

driver.

Active bus-hold circuitry holds unused or undriven

inputs at a valid logic state. Use of pullup or pulldown

resistors with the bus-hold circuitry is not

recommended.