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16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus? Family · Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors · Output Ports Have Equivalent 26-W Series Resistors, So No External Resistors Are Required · Latch-Up Performance Exceeds 250 mA Per JESD 17 ·

文件：457.63 Kbytes 頁數(shù)：18 Pages

TI2

德州儀器

Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26??Series Resistors in Outputs

General Description The ALVCH162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and output enable (OE) are common to each byte and can be shorted together for full 16-bit

文件：94.19 Kbytes 頁數(shù)：6 Pages

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

3.3V CMOS 16-BIT EDGE- TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: ? 0.5 MICRON CMOS Technology ? Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) ? VCC = 3.3V ± 0.3V, Normal Range ? VCC = 2.7V to 3.6V, Extended Range ? VCC = 2.5V ± 0.2V ? CMOS power levels (0.4μ W typ

文件：243.43 Kbytes 頁數(shù)：7 Pages

RENESAS

瑞薩

Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26??Series Resistors in Outputs

General Description The ALVCH162374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and output enable (OE) are common to each byte and can be shorted together for full 16-bit

文件：94.19 Kbytes 頁數(shù)：6 Pages

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

TI
SOP

TI

德州儀器

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