SN74ALVCH162373屬于集成電路（IC）的鎖存器。由美國德州儀器公司制造生產(chǎn)的SN74ALVCH162373鎖存器鎖存器是類似于觸發(fā)器的基本數(shù)字存儲設(shè)備，但是不同之處在于，在鎖存使能（或類似命名）信號處于有效邏輯狀態(tài)的任何時間，保持的邏輯狀態(tài)都可以改變?！巴该鳌辨i存器還允許設(shè)備輸出在鎖存使能信號有效時反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時改變。

FEATURES

· Member of the Texas Instruments Widebus?

Family

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· Output Ports Have Equivalent 26-W Series

Resistors, So No External Resistors Are

Required

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

DESCRIPTION/ORDERING INFORMATION

This 16-bit transparent D-type latch is designed for

1.65-V to 3.6-V VCC operation.

The SN74ALVCH162373 is particularly suitable for

implementing buffer registers, I/O ports, bidirectional

bus drivers, and working registers. This device can

be used as two 8-bit latches or one 16-bit latch.

When the latch-enable (LE) input is high, the Q

outputs follow the data (D) inputs. When LE is taken

low, the Q outputs are latched at the levels set up at

the D inputs.

A buffered output-enable (OE) input can be used to

place the eight outputs in either a normal logic state

(high or low logic levels) or the high-impedance state.

In the high-impedance state, the outputs neither load

nor drive the bus lines significantly. The

high-impedance state and the increased drive provide

the capability to drive bus lines without need for

interface or pullup components. OE does not affect

internal operations of the latch. Old data can be

retained or new data can be entered while the

outputs are in the high-impedance state.

The outputs, which are designed to sink up to 12 mA, include equivalent 26-W resistors to reduce overshoot and

undershoot.