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SN74ALS651ADW集成電路(IC)的緩沖器驅(qū)動(dòng)器接收器收發(fā)器規(guī)格書(shū)PDF中文資料

SN74ALS651ADW
廠商型號(hào)

SN74ALS651ADW

參數(shù)屬性

SN74ALS651ADW 封裝/外殼為24-SOIC(0.295",7.50mm 寬);包裝為卷帶(TR);類別為集成電路(IC)的緩沖器驅(qū)動(dòng)器接收器收發(fā)器;產(chǎn)品描述:IC TXRX INVERT 5.5V 24SOIC

功能描述

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
IC TXRX INVERT 5.5V 24SOIC

封裝外殼

24-SOIC(0.295",7.50mm 寬)

文件大小

583.92 Kbytes

頁(yè)面數(shù)量

31 頁(yè)

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊(cè)

原廠下載下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-11 11:01:00

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SN74ALS651ADW規(guī)格書(shū)詳情

SN74ALS651ADW屬于集成電路(IC)的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由美國(guó)德州儀器公司制造生產(chǎn)的SN74ALS651ADW緩沖器,驅(qū)動(dòng)器,接收器,收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對(duì)某個(gè)電路的邏輯信號(hào)的訪問(wèn),以用于另一電路。緩沖器將其輸入信號(hào)(不變或反相)傳遞到其輸出,并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中,緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

Bus Transceivers/Registers

Independent Registers and Enables for A

and B Buses

Multiplexed Real-Time and Stored Data

Choice of True or Inverting Data Paths

Choice of 3-State or Open-Collector

Outputs to A Bus

description

These devices consist of bus-transceiver circuits,

D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

data bus or from the internal storage registers.

Output-enable (OEAB and OEBA) inputs are

provided to control the transceiver functions.

Select-control (SAB and SBA) inputs are provided

to select real-time or stored data transfer. The

circuitry used for select control eliminates the

typical decoding glitch that occurs in a multiplexer

during the transition between stored and real-time

data. A low input level selects real-time data, and

a high input level selects stored data. Figure 1

illustrates the four fundamental bus-management

functions that can be performed with the octal bus

transceivers and registers

Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at

the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When

SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type

flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input.

When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains

at its last state.

The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the

recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the

SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.

產(chǎn)品屬性

更多
  • 產(chǎn)品編號(hào):

    SN74ALS651ADW

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 緩沖器,驅(qū)動(dòng)器,接收器,收發(fā)器

  • 系列:

    74ALS

  • 包裝:

    卷帶(TR)

  • 邏輯類型:

    收發(fā)器,反相

  • 每個(gè)元件位數(shù):

    8

  • 輸出類型:

    三態(tài)

  • 電流 - 輸出高、低:

    15mA,24mA

  • 電壓 - 供電:

    4.5V ~ 5.5V

  • 工作溫度:

    0°C ~ 70°C(TA)

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    24-SOIC(0.295",7.50mm 寬)

  • 供應(yīng)商器件封裝:

    24-SOIC

  • 描述:

    IC TXRX INVERT 5.5V 24SOIC

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一級(jí)代理/放心采購(gòu)
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Texas Instruments(德州儀器)
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1706+
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只做原裝進(jìn)口,假一罰十
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