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SN74ALS561AN集成電路(IC)的計數(shù)器除法器規(guī)格書PDF中文資料

SN74ALS561AN
廠商型號

SN74ALS561AN

參數(shù)屬性

SN74ALS561AN 封裝/外殼為20-DIP(0.300",7.62mm);包裝為管件;類別為集成電路(IC)的計數(shù)器除法器;產(chǎn)品描述:IC COUNTER BIN 4BIT SYNCH 20-DIP

功能描述

SYNCHRONOUS 4-BIT COUNTERS WITH 3-STATE OUTPUTS
IC COUNTER BIN 4BIT SYNCH 20-DIP

絲印標(biāo)識

SN74ALS561AN

封裝外殼

PDIP / 20-DIP(0.300",7.62mm)

文件大小

315.95 Kbytes

頁面數(shù)量

12

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊

原廠下載下載地址一下載地址二到原廠下載

更新時間

2025-8-16 18:30:00

人工找貨

SN74ALS561AN價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

SN74ALS561AN規(guī)格書詳情

SN74ALS561AN屬于集成電路(IC)的計數(shù)器除法器。由美國德州儀器公司制造生產(chǎn)的SN74ALS561AN計數(shù)器,除法器計數(shù)器和除法器 IC 是數(shù)字邏輯器件,可對輸入發(fā)生的邏輯轉(zhuǎn)換進(jìn)行計數(shù),然后使用多個并行輸出重新發(fā)送累加的計數(shù),和/或生成單個輸出信號轉(zhuǎn)換,從而對應(yīng)用某些整數(shù)數(shù)量輸入信號轉(zhuǎn)換進(jìn)行響應(yīng)。除了簡單的事件計數(shù),它們還可用于各種頻率合成應(yīng)用。

Carry Output for n-Bit Cascading

Buffer-Type Outputs Drive Bus Lines

Directly

Choice of Asynchronous or Synchronous

Clearing and Loading

Internal Look-Ahead Circuitry for Fast

Cascading

Package Options Include Plastic

Small-Outline (DW) Packages, Ceramic

Chip Carriers (FK), and Standard Plastic (N)

and Ceramic (J) 300-mil DIPs

description

These binary counters are programmable and

offer synchronous and asynchronous clearing as

well as synchronous and asynchronous loading.

All synchronous functions are executed on the

positive-going edge of the clock.

The clear function is initiated by applying a low

level to either asynchronous clear (ACLR) or

synchronous clear (SCLR). ACLR (direct clear)

overrides all other functions of the device, while

SCLR overrides only the other synchronous

functions. Data is loaded from the A, B, C, and D

inputs by applying a low level to asynchronous

load (ALOAD) or by the combination of a low level

at synchronous load (SLOAD) and a

positive-going clock transition. The counting

function is enabled only when enable P (ENP),

enable T (ENT), ACLR, ALOAD, SCLR, and

SLOAD are all high.

A high level at the output-enable (OE) input forces the Q outputs into the high-impedance state, and a low level

enables those outputs. Counting is independent of OE. ENT is fed forward to enable the ripple-carry output

(RCO) to produce a high-level pulse while the count is maximum (15). The clocked carry output (CCO) produces

a high-level pulse for a duration equal to that of the low level of the clock when RCO is high and the counter is

enabled (ENP and ENT are high); otherwise, CCO is low. CCO does not have the glitches commonly associated

with a ripple-carry output. Cascading is normally accomplished by connecting RCO or CCO of the first counter

to ENT of the next counter. However, for very high-speed counting, RCO should be used for cascading because

CCO does not become active until the clock returns to the low level.

The SN54ALS561A is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ALS561A is characterized for operation from 0°C to 70°C.

產(chǎn)品屬性

更多
  • 產(chǎn)品編號:

    SN74ALS561AN

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 計數(shù)器,除法器

  • 系列:

    74ALS

  • 包裝:

    管件

  • 邏輯類型:

    二進(jìn)制計數(shù)器

  • 方向:

  • 復(fù)位:

    異步/同步

  • 定時:

    同步

  • 觸發(fā)器類型:

    正邊沿

  • 工作溫度:

    0°C ~ 70°C

  • 安裝類型:

    通孔

  • 封裝/外殼:

    20-DIP(0.300",7.62mm)

  • 供應(yīng)商器件封裝:

    20-PDIP

  • 描述:

    IC COUNTER BIN 4BIT SYNCH 20-DIP

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價格
TI(德州儀器)
2024+
PDIP-20
500000
誠信服務(wù),絕對原裝原盤
詢價
TI
23+
462
45567
公司原裝現(xiàn)貨!主營品牌!可含稅歡迎查詢
詢價
TI
89
4
公司優(yōu)勢庫存 熱賣中!!
詢價
TI
2025+
PDIP-20
16000
原裝優(yōu)勢絕對有貨
詢價
24+
3000
自己現(xiàn)貨
詢價
TI
22+
20PDIP
9000
原廠渠道,現(xiàn)貨配單
詢價
TI/德州儀器
25+
PDIP-20
860000
明嘉萊只做原裝正品現(xiàn)貨
詢價
TI
23+
QFP
5000
原裝正品,假一罰十
詢價
TI(德州儀器)
24+
PDIP20
1490
原裝現(xiàn)貨,免費(fèi)供樣,技術(shù)支持,原廠對接
詢價
TEXASINSTRUMENTS
2447
NA
100500
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨
詢價