SN74ACT533PW屬于集成電路（IC）的鎖存器。由美國(guó)德州儀器公司制造生產(chǎn)的SN74ACT533PW鎖存器鎖存器是類(lèi)似于觸發(fā)器的基本數(shù)字存儲(chǔ)設(shè)備，但是不同之處在于，在鎖存使能（或類(lèi)似命名）信號(hào)處于有效邏輯狀態(tài)的任何時(shí)間，保持的邏輯狀態(tài)都可以改變。“透明”鎖存器還允許設(shè)備輸出在鎖存使能信號(hào)有效時(shí)反映輸入的當(dāng)前狀態(tài)，而相反的是，狀態(tài)僅在保持狀態(tài)已固定時(shí)改變。

4.5-V to 5.5-V VCC Operation

Inputs Accept Voltages to 5.5 V

Max tpd of 11 ns at 5 V

Inputs Are TTL-Voltage Compatible

3-State Inverting Outputs Drive Bus Lines

Directly

description/ordering information

The ’ACT533 devices are octal transparent

D-type latches with 3-state outputs. When the

latch-enable (LE) input is high, the Q outputs

follow the complements of the data (D) inputs.

When LE is taken low, the Q outputs are latched

at the inverted levels set up at the D inputs.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the

latches. Old data can be retained or new data can

be entered while the outputs are in the

high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.