SN74ABTH16244DGGR屬于集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74ABTH16244DGGR緩沖器，驅(qū)動器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動器、接收器和收發(fā)器允許隔離對某個電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動負載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進行隔離通信。

Members of the Texas Instruments

WidebusE Family

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

Latch-Up Performance Exceeds 500 mA Per

JESD 17

Typical VOLP (Output Ground Bounce)

<1 V at VCC = 5 V, TA = 25°C

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Package Options Include Plastic Shrink

Small-Outline (DL), Thin Shrink

Small-Outline (DGG), Thin Very

Small-Outline (DGV) Packages, and 380-mil

Fine-Pitch Ceramic Flat (WD) Packages

description

The ’ABTH16244 devices are 16-bit buffers and

line drivers designed specifically to improve both

the performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented

receivers and transmitters. These devices can be

used as four 4-bit buffers, two 8-bit buffers, or one

16-bit buffer. These devices provide true outputs

and symmetrical active-low output-enable (OE)

inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN54ABTH16244 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ABTH16244 is characterized for operation from –40°C to 85°C.