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SN74ABT821ADW.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

SN74ABT821ADW.B
廠商型號(hào)

SN74ABT821ADW.B

功能描述

10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

文件大小

343.04 Kbytes

頁面數(shù)量

15

生產(chǎn)廠商

TI2

中文名稱

德州儀器

網(wǎng)址

網(wǎng)址

數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-9 18:30:00

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SN74ABT821ADW.B規(guī)格書詳情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK), Ceramic Flat (W) Package,

and Plastic (NT) and Ceramic (JT) DIPs

description

These 10-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

The ten flip-flops are edge-triggered D-type

flip-flops. On the positive transition of the clock

(CLK) input, the devices provide true data at the

Q outputs.

A buffered output-enable (OE) input can be used

to place the ten outputs in either a normal logic

state (high or low logic levels) or a high-impedance

state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can

be entered while the outputs are in the high-impedance state.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT821 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT821A is characterized for operation from –40°C to 85°C.

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫(kù)存 備注 價(jià)格
TI(德州儀器)
2024+
SOIC-24-300mil
500000
誠(chéng)信服務(wù),絕對(duì)原裝原盤
詢價(jià)
TI/德州儀器
22+
SOIC20
18000
只做全新原裝,支持BOM配單,假一罰十
詢價(jià)
TI/德州儀器
25+
原廠封裝
10280
原廠授權(quán)代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源!
詢價(jià)
TI
2025+
SOIC-24
16000
原裝優(yōu)勢(shì)絕對(duì)有貨
詢價(jià)
24+
3000
自己現(xiàn)貨
詢價(jià)
TI
23+
SOP-24
3200
正規(guī)渠道,只有原裝!
詢價(jià)
TI
23+
NA
20000
詢價(jià)
TI
23+
8/SOP
5000
原裝正品,假一罰十
詢價(jià)
TI
22+
24SOIC
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
TI/德州儀器
22+
SO24
14008
原裝正品
詢價(jià)