描述 Description

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and ) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ′ABT652.
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs regardless of the select- or enable-control pins. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and . In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.
To ensure the high-impedance state during power up or power down, should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver (B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver (A to B).
The SN74ABT652 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT652 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT652 is characterized for operation from -40°C to 85°C.
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特性 Features

·State-of-the-Art EPIC-IIBTM BiCMOS DesignSignificantly Reduces Power Dissipation·ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015;Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)·Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17·Typical VOLP (Output Ground Bounce) CC = 5 V, TA = 25°C·High-Drive Outputs (-32-mA IOH, 64-mAIOL)·Package Options Include Plastic Small-Outline ((DW)) andShrink Small-Outline (DB) Packages, Ceramic Chip Carriers (FK),and Plastic (NT) and Ceramic (JT) DIPs ?EPIC-IIB is a trademark of Texas Instruments Incorporated.