SN74ABT162827ADL屬于集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74ABT162827ADL緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對某個(gè)電路的邏輯信號(hào)的訪問，以用于另一電路。緩沖器將其輸入信號(hào)（不變或反相）傳遞到其輸出，并可能用于清除弱信號(hào)或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

Members of the Texas Instruments

Widebus? Family

Output Ports Have Equivalent 25-Ω Series

Resistors, So No External Resistors Are

Required

High-Impedance State During Power Up

and Power Down

Typical VOLP (Output Ground Bounce)

<1 V at VCC = 5 V, TA = 25°C

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Ioff and Power-Up 3-State Support Hot

Insertion

Flow-Through Architecture Optimizes PCB

Layout

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

ESD Protection Exceeds JESD 22

? 2000-V Human-Body Model (A114-A)

? 200-V Machine Model (A115-A)

description/ordering information

The ’ABT162827A devices are noninverting

20-bit buffers composed of two 10-bit buffers with

separate output-enable signals. For either 10-bit

buffer, the two output-enable (1OE1 and 1OE2, or

2OE1 and 2OE2) inputs must both be low for the

corresponding Y outputs to be active. If either

output-enable input is high, the outputs of that

10-bit buffer are in the high-impedance state.

The outputs, which are designed to source or sink

up to 12 mA, include equivalent 25-Ω series

resistors to reduce overshoot and undershoot.