Members of the Texas Instruments

Widebus? Family

Output Ports Have Equivalent 25-Ω Series

Resistors So No External Resistors Are

Required

Typical VOLP (Output Ground Bounce)

<1 V at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

Ioff and Power-Up 3-State Support Hot

Insertion

Distributed VCC and GND Pins Minimize

High-Speed Switching Noise

Flow-Through Architecture Optimizes PCB

Layout

description/ordering information

These 18-bit bus-interface flip-flops feature

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing wider buffer registers, I/O ports,

bidirectional bus drivers with parity, and working

registers.

The ’ABT162823A devices can be used as two

9-bit flip-flops or one 18-bit flip-flop. With the

clock-enable (CLKEN) input low, the D-type

flip-flops enter data on the low-to-high transitions

of the clock. Taking CLKEN high disables the

clock buffer, thus latching the outputs. Taking the

clear (CLR) input low causes the Q outputs to go

low independently of the clock.