SN74ABT16240ADLR屬于集成電路（IC）的緩沖器驅(qū)動(dòng)器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN74ABT16240ADLR緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器邏輯緩沖器、驅(qū)動(dòng)器、接收器和收發(fā)器允許隔離對某個(gè)電路的邏輯信號的訪問，以用于另一電路。緩沖器將其輸入信號（不變或反相）傳遞到其輸出，并可能用于清除弱信號或驅(qū)動(dòng)負(fù)載。在布爾邏輯仿真器中，緩沖器主要用于增加傳播延遲。邏輯接收器和收發(fā)器允許在數(shù)據(jù)總線之間進(jìn)行隔離通信。

FEATURES

· Members of the Texas Instruments

Widebus? Family

· State-of-the-Art EPIC-IIB? BiCMOS Design

Significantly Reduces Power Dissipation

· Latch-Up Performance Exceeds 500 mA Per

JESD 70

· Typical VOLP (Output Ground Bounce) <1 V

at VCC = 5 V, TA = 25°C

· Distributed VCC and GND Pin Configuration

Minimizes High-Speed Switching Noise

· Flow-Through Architecture Optimizes PCB

Layout

· High-Drive Outputs (–32-mA IOH, 64-mA IOL)

· Package Options Include Plastic 300-mil

Shrink Small-Outline (DL), Thin Shrink

Small-Outline (DGG), and Thin Very

Small-Outline (DGV) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

Using 25-mil Center-to-Center Spacings

DESCRIPTION

The SN54ABT16244 and SN74ABT16244A are 16-bit

buffers and line drivers designed specifically to

improve both the performance and density of 3-state

memory address drivers, clock drivers, and

bus-oriented receivers and transmitters. These

devices can be used as four 4-bit buffers, two 8-bit

buffers, or one 16-bit buffer. These devices provide

true outputs and symmetrical OE (active-low

output-enable) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT16244 is characterized for operation over the full military temperature range of –55°C to 125°C.

The SN74ABT16244A is characterized for operation from –40°C to 85°C.