最新无码a∨在线观看,一本av高清一区二区三区,亚洲熟妇色l20p,宅男噜噜69av,中出あ人妻熟女中文字幕

首頁>SN65LVDS95>規(guī)格書詳情

SN65LVDS95數(shù)據(jù)手冊集成電路(IC)的串行器解串器規(guī)格書PDF

PDF無圖
廠商型號

SN65LVDS95

參數(shù)屬性

SN65LVDS95 封裝/外殼為48-TFSOP(0.240",6.10mm 寬);包裝為卷帶(TR);類別為集成電路(IC)的串行器解串器;產(chǎn)品描述:IC LVDS SERDES TX 48-TSSOP

功能描述

Serdes 串行器

封裝外殼

48-TFSOP(0.240",6.10mm 寬)

制造商

TI Texas Instruments

中文名稱

德州儀器 美國德州儀器公司

數(shù)據(jù)手冊

下載地址下載地址二

更新時(shí)間

2025-8-20 9:31:00

人工找貨

SN65LVDS95價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨

SN65LVDS95規(guī)格書詳情

描述 Description

The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 4 balanced-pair conductors for receipt by a compatible receiver, such as the SN65LVDS96. When transmitting, data bits D0 through D20 are each loaded into registers of the SN65LVDS95 on the rising edge of the input clock signal (CLKIN). The frequency of CLKIN is multiplied seven times and then used to serially unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN. The SN65LVDS95 requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A lowlevel on this signal clears all internal registers to a low level. The SN65LVDS95 is characterized for operation over ambient air temperatures of ?40°C to 85°C.

特性 Features

? 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput
? Suited for Point-to-Point Subsystem Communication With Very Low EMI
? 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus Clock Out Low-Voltage Differential
? Operates From a Single 3.3-V Supply and 250 mW (Typ)
? 5-V Tolerant Data Inputs
? ’LVDS95 Has Rising Clock Edge Triggered Inputs
? Bus Pins Tolerate 6-kV HBM ESD
? Packaged in Thin Shrink Small-Outline Package With 20 Mil Terminal Pitch
? Consumes 20 MHz to 68 MHz
? No External Components Required for PLL
? Inputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
? Industrial Temperature Qualified TA = –40°C to 85°C
? Replacement for the National DS90CR215

技術(shù)參數(shù)

  • 產(chǎn)品編號:

    SN65LVDS95DGGG4

  • 制造商:

    Texas Instruments

  • 類別:

    集成電路(IC) > 串行器,解串器

  • 包裝:

    卷帶(TR)

  • 功能:

    串行器

  • 數(shù)據(jù)速率:

    1.428Gbps

  • 輸入類型:

    LVDS

  • 輸出類型:

    LVTTL

  • 輸入數(shù):

    21

  • 輸出數(shù):

    3

  • 電壓 - 供電:

    3V ~ 3.6V

  • 工作溫度:

    -40°C ~ 85°C(TA)

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    48-TFSOP(0.240",6.10mm 寬)

  • 供應(yīng)商器件封裝:

    48-TSSOP

  • 描述:

    IC LVDS SERDES TX 48-TSSOP

供應(yīng)商 型號 品牌 批號 封裝 庫存 備注 價(jià)格
TI
24+
TSSOP48
20000
全新原廠原裝,進(jìn)口正品現(xiàn)貨,正規(guī)渠道可含稅??!
詢價(jià)
TI/德州儀器
21+
TSSOP-48
10000
全新原裝 公司現(xiàn)貨 價(jià)格優(yōu)
詢價(jià)
TI
22+
48TSSOP
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
TI
TSSOP-48
6800
一級代理 原裝正品假一罰十價(jià)格優(yōu)勢長期供貨
詢價(jià)
TI/德州儀器
23+
TSSOP48
11200
原廠授權(quán)一級代理、全球訂貨優(yōu)勢渠道、可提供一站式BO
詢價(jià)
TI
23+
TSSOP48
10500
全新原裝現(xiàn)貨,假一賠十
詢價(jià)
TI德州儀器
22+
24000
原裝正品現(xiàn)貨,實(shí)單可談,量大價(jià)優(yōu)
詢價(jià)
TI
23+
SOP
3600
絕對全新原裝!優(yōu)勢供貨渠道!特價(jià)!請放心訂購!
詢價(jià)
TI
23+
TSSOP-48PI
3200
正規(guī)渠道,只有原裝!
詢價(jià)
TI
23+
N/A
560
原廠原裝
詢價(jià)