首頁>SN65LVDS86A-Q1>規(guī)格書詳情
SN65LVDS86A-Q1數(shù)據(jù)手冊TI中文資料規(guī)格書

廠商型號 |
SN65LVDS86A-Q1 |
功能描述 | 汽車類 FlatLink 接收器 |
制造商 | TI Texas Instruments |
中文名稱 | 德州儀器 美國德州儀器公司 |
數(shù)據(jù)手冊 | |
更新時(shí)間 | 2025-8-20 7:44:00 |
人工找貨 | SN65LVDS86A-Q1價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SN65LVDS86A-Q1規(guī)格書詳情
描述 Description
The SN65LVDS86A FlatLink? receiver contains three serial-in 7-bit parallel-out shift registers and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, ?83, ?84, or ?85, over four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data at a lower transfer rate.
When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. The SN65LVDS86A presents valid data on the falling edge of the output clock (CLKOUT).
The SN65LVDS86A requires only four line-termination resistors for the differential inputs and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A low level on this signal clears all internal registers to a low level.
The SN65LVDS86A is characterized for operation over the full automotive temperature range of –40°C to 125°C.
特性 Features
? 3:21 Data Channel Expansion at up to 178.5?Mbytes/s Throughput
? Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
? Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out
? Operates From a Single 3.3-V Supply
? Tolerates 4-kV Human-Body Model (HBM) ESD
? Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
? Consumes Less Than 1 mW When Disabled
? Wide Phase-Lock Input Frequency Range 31?MHz to 68 MHz
? No External Components Required for PLL
? Inputs Meet or Exceed the Standard Requirements of ANSI EIA/TIA-644 Standard
? Improved Replacement for the SN75LVDS86 and NSC DS90C364
? Improved Jitter Tolerance
? Qualified for Automotive Applications
技術(shù)參數(shù)
- 制造商編號
:SN65LVDS86A-Q1
- 生產(chǎn)廠家
:TI
- Protocols
:Channel-Link I
- Parallel bus width(bits)
:21
- Signaling rate(Mbps)
:1785
- Input signal
:LVDS
- Output signal
:LVTTL
- Package Group
:TSSOP | 48
- Operating temperature range(C)
:-40 to 125
- Rating
:Automotive
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI |
24+ |
TSSOP48 |
90000 |
一級代理商進(jìn)口原裝現(xiàn)貨、假一罰十價(jià)格合理 |
詢價(jià) | ||
TI(德州儀器) |
24+ |
NA/ |
8735 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價(jià) | ||
TI(德州儀器) |
24+ |
TSSOP48 |
7350 |
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!! |
詢價(jià) | ||
TI |
2016+ |
TSSOP |
3500 |
本公司只做原裝,假一罰十,可開17%增值稅發(fā)票! |
詢價(jià) | ||
TI |
23+ |
TSSOP |
10500 |
全新原裝現(xiàn)貨,假一賠十 |
詢價(jià) | ||
TI |
22+ |
48-TSSOP |
5000 |
全新原裝,力挺實(shí)單 |
詢價(jià) | ||
TI |
25+23+ |
TSSOP |
26586 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
TI |
2018+ |
TSSOP |
11256 |
只做進(jìn)口原裝正品!假一賠十! |
詢價(jià) | ||
TI |
2025+ |
TSSOP-48 |
16000 |
原裝優(yōu)勢絕對有貨 |
詢價(jià) | ||
TI |
23+ |
N/A |
560 |
原廠原裝 |
詢價(jià) |