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SN65LVDS122PWR.B中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
SN65LVDS122PWR.B |
功能描述 | 1.5-Gbps 2 ′ 2 LVDS CROSSPOINT SWITCH |
文件大小 |
736.55 Kbytes |
頁(yè)面數(shù)量 |
23 頁(yè) |
生產(chǎn)廠商 | TI2 |
中文名稱 | 德州儀器 |
網(wǎng)址 | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-17 11:33:00 |
人工找貨 | SN65LVDS122PWR.B價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SN65LVDS122PWR.B規(guī)格書詳情
FEATURES
· Designed for Signaling Rates (1) Up To
1.5 Gbps
· Total Jitter < 65 ps
· Pin-Compatible With SN65LVDS22 and
SN65LVDM22
· 25 mV of Receiver Input Threshold Hysteresis
Over 0-V to 4-V Common-Mode Range
· Inputs Electrically Compatible With CML,
LVPECL and LVDS Signal Levels
· Propagation Delay Times, 900 ps Maximum
· LVDT Integrates 110-W Terminating Resistor
· Offered in SOIC and TSSOP
APPLICATIONS
· 10-G (OC-192) Optical Modules
· 622-MHz Central Office Clock Distribution
· Wireless Basestations
· Low Jitter Clock Repeater/Multiplexer
· Protection Switching for Serial Backplanes
DESCRIPTION
The SN65LVDS122 and SN65LVDT122 are
crosspoint switches that use low voltage differential
signaling (LVDS) to achieve signaling rates as high
as 1.5 Gbps. They are pin-compatible speed up- grades to the SN65LVDS22 and SN65LVDM22. The
internal signal paths maintain differential signaling for
high speeds and low signal skews. These devices
have a 0-V to 4-V common-mode input range that
accepts LVDS, LVPECL, or CML inputs. Two logic
pins (S0 and S1) set the internal configuration between
the differential inputs and outputs. This allows
the flexibility to perform the following configurations:
2 x 2 crosspoint switch, 2:1 input multiplexer, 1:2
splitter or dual repeater/translator within a single
device. Additionally, SN65LVDT122 incorporates a
110-W termination resistor for those applications
where board space is a premium. Although these
devices are designed for 1.5 Gbps, some applications
at a 2-Gbps data rate can be supported depending on
loading and signal quality.
The intended application of this device is ideal for
loopback switching for diagnostic routines, fanout
buffering of clock/data distribution provide protection
in fault-tolerant systems, clock multiplexing in optical
modules, and for overall signal boosting over
extended distances.
The SN65LVDS122 and SN65LVDT122 are
characterized for operation from –40°C to 85°C.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/TEXAS |
23+ |
原廠封裝 |
8931 |
詢價(jià) | |||
TI/德州儀器 |
23+ |
NA |
11200 |
原廠授權(quán)一級(jí)代理、全球訂貨優(yōu)勢(shì)渠道、可提供一站式BO |
詢價(jià) | ||
TI/德州儀器 |
2447 |
TSSOP-16 |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
TI |
2025+ |
TSSOP-16 |
16000 |
原裝優(yōu)勢(shì)絕對(duì)有貨 |
詢價(jià) | ||
TI/德州儀器 |
25+ |
TSSOP |
880000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
TI/德州儀器 |
23+ |
16TSSOP |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢價(jià) | ||
TI |
22+ |
16TSSOP |
9000 |
原廠渠道,現(xiàn)貨配單 |
詢價(jià) | ||
Texas Instruments |
24+ |
16-TSSOP |
56300 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) | ||
TI |
24+ |
40 |
詢價(jià) | ||||
進(jìn)口原廠原裝 |
25+ |
原廠原封可拆樣 |
54288 |
百分百原裝現(xiàn)貨 實(shí)單必成 |
詢價(jià) |