SN65LVDS048APWG4屬于集成電路（IC）的驅(qū)動器接收器收發(fā)器。由美國德州儀器公司制造生產(chǎn)的SN65LVDS048APWG4驅(qū)動器，接收器，收發(fā)器該系列產(chǎn)品的主要功能是提供必需的硬件資源，以通過延長電纜或印制線進行通信。確切的功能會因所采用的通信協(xié)議而異，可能包括諸如瞬態(tài)抑制之類的功能，這些功能對于通信用途可能并非絕對必要，但對于可能的使用環(huán)境卻是明智之選。

FEATURES

· >400 Mbps (200 MHz) Signaling Rates

· Flow-Through Pinout Simplifies PCB Layout

· 50 ps Channel-to-Channel Skew (Typ)

· 200 ps Differential Skew (Typ)

· Propagation Delay Times 2.7 ns (Typ)

· 3.3-V Power Supply Design

· High Impedance LVDS Inputs on Power Down

· Low-Power Dissipation (40 mW at 3.3 V Static)

· Accepts Small Swing (350 mV) Differential

Signal Levels

· Supports Open, Short, and Terminated Input

Fail-Safe

· Industrial Operating Temperature Range

(–40°C to 85°C)

· Conforms to TIA/EIA-644 LVDS Standard

· Available in SOIC and TSSOP Packages

· Pin-Compatible With DS90LV048A From

National

DESCRIPTION

The SN65LVDS048A is a quad differential line receiver that implements the electrical characteristics of

low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V

differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and

allow operation with a 3.3-V supply rail. Any of the quad differential receivers will provide a valid logical output

state with a ±100-mV differential input voltage within the input common-mode voltage range. The input

common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes

The intended application of this device and signaling technique is for point-to-point baseband data transmission

over controlled impedance media of approximately 100 W. The transmission media may be printed-circuit board

traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation

characteristics of the media, the noise coupling to the environment, and other system characteristics.

The SN65LVDS048A is characterized for operation from –40°C to 85°C.