SN65LVCP22DR屬于集成電路（IC）的信號開關多路復用器解碼器。由美國德州儀器公司制造生產(chǎn)的SN65LVCP22DR信號開關，多路復用器，解碼器邏輯型信號開關、多路復用器和編碼器 IC 可用于對以數(shù)字格式表示數(shù)據(jù)的電信號進行路由和選擇。這些器件與設計用于模擬信號的類似產(chǎn)品有所不同，它們保留的信息表示為兩個電狀態(tài)之一，而不是兩個外部界限內(nèi)的無窮變化量。

FEATURES

· High Speed (>1000 Mbps) Upgrade for

DS90CP22 2x2 LVDS Crosspoint Switch

· LVPECL Crosspoint Switch Available in

SN65LVCP23

· Low-Jitter Fully Differential Data Path

· 50 ps (Typ), of Peak-to-Peak Jitter With PRBS

= 223–1 Pattern

· Less Than 200 mW (Typ), 300 mW (Max) Total

Power Dissipation

· Output (Channel-to-Channel) Skew Is 10 ps

(Typ), 50 ps (Max)

· Configurable as 2:1 Mux, 1:2 Demux, Repeater

or 1:2 Signal Splitter

· Inputs Accept LVDS, LVPECL, and CML

Signals

· Fast Switch Time of 1.7 ns (Typ)

· Fast Propagation Delay of 0.65 ns (Typ)

· 16 Lead SOIC and TSSOP Packages

· Inter-Operates With TIA/EIA-644-A LVDS

Standard

· Operating Temperature: –40°C to 85°C

APPLICATIONS

· Base Stations

· Add/Drop Muxes

· Protection Switching for Serial Backplanes

· Network Switches/Routers

· Optical Networking Line Cards/Switches

· Clock Distribution

DESCRIPTION

The SN65LVCP22 is a 2′2 crosspoint switch

providing greater than 1000 Mbps operation for each

path. The dual channels incorporate wide

common-mode (0 V to 4 V) receivers, allowing for the

receipt of LVDS, LVPECL, and CML signals. The

dual outputs are LVDS drivers to provide low-power,

low-EMI, high-speed operation. The SN65LVCP22

provides a single device supporting 2:2 buffering

(repeating), 1:2 splitting, 2:1 multiplexing, 2′2

switching, and LVPECL/CML to LVDS level

translation on each channel. The flexible operation of

the SN65LVCP22 provides a single device to support

the redundant serial bus transmission needs (working

and protection switching cards) of fault-tolerant switch

systems found in optical networking, wireless

infrastructure, and data commu- nications systems. TI offers additional gigibit repeater/ translator and

crosspoint products in the SN65LVDS100 and

SN65LVDS122.

The SN65LVCP22 uses a fully differential data path

to ensure low-noise generation, fast switching times,

low pulse width distortion, and low jitter. Output

channel-to- channel skew is less than 10 ps (typ) and

50 ps (max) to ensure accurate alignment of outputs

in all applications. Both SOIC and TSSOP package

options are available to allow easy upgrade for

existing solutions, and board area savings where

space is critical.