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SN54LVTH16374中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
SN54LVTH16374 |
功能描述 | 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
文件大小 |
1.01495 Mbytes |
頁面數(shù)量 |
19 頁 |
生產(chǎn)廠商 | TI2 |
中文名稱 | 德州儀器 |
網(wǎng)址 | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-8-15 16:30:00 |
人工找貨 | SN54LVTH16374價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
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FEATURES
· Members of the Texas Instruments Widebus?
Family
· State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
· Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
· Support Unregulated Battery Operation Down
to 2.7 V
· Typical VOLP (Output Ground Bounce) <0.8 V at
VCC = 3.3 V, TA = 25°C
· Ioff and Power-Up 3-State Support Hot Insertion
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
· Flow-Through Architecture Optimizes PCB
Layout
· Latch-Up Performance Exceeds 500 mA Per
JESD 17
· ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working
registers.
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock
(CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI/德州儀器 |
QQ咨詢 |
DIP |
76 |
全新原裝 研究所指定供貨商 |
詢價(jià) | ||
TI/TEXAS |
23+ |
原廠封裝 |
8931 |
詢價(jià) | |||
TI |
24+ |
CDIP14 |
2568 |
原裝優(yōu)勢(shì)!絕對(duì)公司現(xiàn)貨 |
詢價(jià) | ||
TI/德州儀器 |
22+ |
DIP |
12245 |
現(xiàn)貨,原廠原裝假一罰十! |
詢價(jià) | ||
TI |
8622 |
1 |
公司優(yōu)勢(shì)庫存 熱賣中! |
詢價(jià) | |||
TI |
三年內(nèi) |
1983 |
只做原裝正品 |
詢價(jià) | |||
TI |
1725+ |
CDIP14 |
3256 |
科恒偉業(yè)!只做原裝正品,假一賠十! |
詢價(jià) | ||
24+ |
DIP16 |
3000 |
自己現(xiàn)貨 |
詢價(jià) | |||
TI |
24+ |
3378 |
絕對(duì)原裝公司現(xiàn)貨供應(yīng)!價(jià)格優(yōu)勢(shì) |
詢價(jià) | |||
TI |
23+ |
CDIP |
5000 |
原裝正品,假一罰十 |
詢價(jià) |