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SN54LS137J.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

SN54LS137J.A
廠商型號(hào)

SN54LS137J.A

功能描述

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES

絲印標(biāo)識(shí)

SN54LS137J

封裝外殼

CDIP

文件大小

303.41 Kbytes

頁(yè)面數(shù)量

8 頁(yè)

生產(chǎn)廠商 Texas Instruments
企業(yè)簡(jiǎn)稱

TI2德州儀器

中文名稱

美國(guó)德州儀器公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-8-1 14:11:00

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SN54LS137J.A規(guī)格書詳情

Combines Decoder and 3-Bit Address Latch

Incorporates 2 Enable Inputs to Simplify

Cascading

Low Power Dissipation . . . 656 mW Typ

description

The ‘'LS137 is a three-line to eight-line

decoder/demultiplexer with latches on the three ad-

dress inputs. When the latch-enable input (GL) is low,

the LS137 acts as a decoder/demultiplexer. When GL

goes from low to high, the address present at the select

inputs (A,B, and C) is stored in the latches. Further ad-

dress changes are ignored as long as GL remains high.

The output enable controls, G1 and G2, control the

state of the outputs independently of the select or latch-

enable inputs. All of the outputs are high unless G1 is

high and G2 is low. The ‘LS137 is ideally suited for

implementing glitch-free decoders in strobed (stored-

address) applications in bus-oriented systems.

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1948+
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15
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23+
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2020+
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24+
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