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SN54ALS193AJ.A中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

廠(chǎng)商型號(hào) |
SN54ALS193AJ.A |
功能描述 | SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS WITH DUAL CLOCK AND CLEAR |
絲印標(biāo)識(shí) | |
封裝外殼 | CDIP |
文件大小 |
439.16 Kbytes |
頁(yè)面數(shù)量 |
15 頁(yè) |
生產(chǎn)廠(chǎng)商 | Texas Instruments |
企業(yè)簡(jiǎn)稱(chēng) |
TI2【德州儀器】 |
中文名稱(chēng) | 美國(guó)德州儀器公司官網(wǎng) |
原廠(chǎng)標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-7-31 18:33:00 |
人工找貨 | SN54ALS193AJ.A價(jià)格和庫(kù)存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
SN54ALS193AJ.A規(guī)格書(shū)詳情
Look-Ahead Circuitry Enhances Cascaded
Counters
Fully Synchronous in Count Modes
Parallel Asynchronous Load for Modulo-N
Count Lengths
Asynchronous Clear
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
The ’ALS193A are synchronous, reversible, 4-bit
up/down binary counters. Synchronous counting
operation is provided by having all flip-flops
clocked simultaneously so that the outputs
change coincident with each other when
instructed by the steering logic. This mode of
operation eliminates the output counting spikes
normally associated with asynchronous (rippleclock)
counters.
The outputs of the four flip-flops are triggered on
a low-to-high-level transition of either count/clock
(UP or DOWN) input. The direction of the count is
determined by which count input is pulsed while
the other count input is high.
All four counters are fully programmable; that is, each output may be preset to either level by placing a low on
the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the
data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers
by simply modifying the count length with the preset inputs.
A high level applied to the clear (CLR) input forces all outputs to the low level. The clear function is independent
of the count and LOAD inputs. The UP, DOWN, and LOAD inputs are buffered to lower the drive requirement,
which significantly reduces the loading on, or current required by, clock drivers, etc., for long parallel words.
These counters are designed to be cascaded without the need for external circuitry. The borrow (BO) output
produces a low-level pulse while the count is zero (all Q outputs low) and the DOWN input is low. Similarily, the
carry (CO) output produces a low-level pulse while the count is 9 or 15 (all Q outputs high) and the UP input
is low. The counters can then be easily cascaded by feeding BO and CO to the count-down and count-up inputs,
respectively, of the succeeding counter.
The SN54ALS193A is characterized for operation over the full military temperature range of ?55°C to 125°C.
The SN74ALS193A is characterized for operation from 0°C to 70°C.
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
TI |
2017+ |
CDIP20 |
6528 |
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TI |
0233+ |
CDIP |
41 |
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2021+ |
60000 |
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TI/德州儀器 |
22+ |
CDIP |
12245 |
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TI |
24+ |
2978 |
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3200 |
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23+ |
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8560 |
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24+ |
3000 |
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23+ |
CDIP |
11200 |
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