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SC28L92A1B

3.3V-5.0V Dual Universal Asynchronous Receiver/Transmitter DUART

DESCRIPTION TheSC28L92isapinandfunctionreplacementfortheSCC2692andSC26C92operatingat3.3or5voltssupplywithaddedfeaturesanddeeperFIFOs.ItsconfigurationonpowerupisthatoftheSC26C92.Itsdifferencesfromthe2692are:16characterreceiver,16charactertransmitFIFO

SC28L92A1B

3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter (DUART); Member of IMPACT family: 3.3 V to 5.0 V, -40 Cel to +85 Cel and 68xxx or 80xxx bus interface for all devices\nDual full-duplex independent asynchronous receiver/transmitters\n16 character FIFOs for each receiver and transmitter\nPin programming selects 68xxx or 80xxx bus interface\nProgrammable data format 5 data to 8 data bits plus parity\nOdd, even, no parity or force parity\n1 stop, 1.5 stop or 2 stop bits programmable in 1/16-bit increments\n16-bit programmable counter/timer\nProgrammable baud rate for each receiver and transmitter selectable from: 28 fixed rates: 50 kBd to 230.4 kBd\nOther baud rates to 1 MHz at 16x\nProgrammable user-defined rates derived from a programmable counter/timer\nExternal 1x or 16x clock\nParity, framing, and overrun error detection\nFalse start bit detection\nLine break detection and generation\nProgrammable channel mode Normal (full-duplex)\nAutomatic echo\nLocal loopback\nRemote loopback\nMulti-drop mode (also called wake-up or 9-bit)\nMulti-function 7-bit input port (includes IACKN) Can serve as clock or control inputs\nChange of state detection on four inputs\nInputs have typically > 100 kΩ pull-up resistors\nChange of state detectors for modem control\nMulti-function 8-bit output port Individual bit set/reset capability\nOutputs can be programmed to be status/interrupt signals\nFIFO status for DMA interface\nVersatile interrupt system Single interrupt output with eight maskable interrupting conditions\nOutput port can be configured to provide a total of up to six separate interrupt outputs that may be wire ORed\nEach FIFO can be programmed for four different interrupt levels\nWatchdog timer for each receiver\nMaximum data transfer rates: 1x - 1 Mbit/s, 16x - 1 Mbit/s\nAutomatic wake-up mode for multi-drop applications\nStart-end break interrupt/status\nDetects break which originates in the middle of a character\nOn-chip crystal oscillator\nPower-down mode\nReceiver time-out mode\nSingle 3.3 V or 5 V power supply\nPowers up to emulate SC26C92\n;

The SC28L92 is a pin and function replacement for the SCC2692 and SC26C92 operating at 3.3 V or 5 V supply with added features and deeper FIFOs. Its configuration on power-up is that of the SC26C92. Its differences from the SCC2692 and SC26C92 are: 16 character receiver, 16 character transmit FIFOs, watchdog timer for each receiver, mode register 0 is added, extended baud rate and overall faster speeds, programmable receiver and transmitter interrupts. (Neither the SC26C92 nor the SCC2692 is being discontinued.)\nPin programming will allow the device to operate with either the Motorola or Intel bus interface. The bit 3 of the MR0A register allows the device to operate in an 8 byte FIFO mode if strict compliance with the SC26C92 FIFO structure is required.\nThe NXP Semiconductors SC28L92 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. It interfaces directly with microprocessors and may be used in a polled or interrupt driven system with modem and DMA interface.\nThe operating mode and data format of each channel can be programmed independently. Additionally, each receiver and transmitter can select its operating speed as one of 28 fixed baud rates; a 16x clock derived from a programmable counter/timer, or an external 1x or 16x clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems.\nEach receiver and transmitter is buffered by 8 or 16 character FIFOs to minimize the potential of receiver overrun, transmitter underrun and to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability is provided via RTS/CTS signaling to disable a remote transmitter when the receiver buffer is full.\nAlso provided on the SC28L92 are a multipurpose 7-bit input port and a multipurpose 8-bit output port. These can be used as general purpose I/O ports or can be assigned specific functions (such as clock inputs or status/interrupt outputs) under program control.\nThe SC28L92 is available in three package versions: PLCC44, QFP44, and HVQFN48.\n

SC28L92A1A

3.3V-5.0VDualUniversalAsynchronousReceiver/TransmitterDUART

DESCRIPTION TheSC28L92isapinandfunctionreplacementfortheSCC2692andSC26C92operatingat3.3or5voltssupplywithaddedfeaturesanddeeperFIFOs.ItsconfigurationonpowerupisthatoftheSC26C92.Itsdifferencesfromthe2692are:16characterreceiver,16charactertransmitFIFO