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SC28L202A1DGG

雙通道通用異步接收器/發(fā)送器(DUART); Member of IMPACT family: 3.3 V to 5.0 V , -40 Cel to +85 Cel and 80xx or 68k bus interface (I/M modes) for all devices.\nBit-by-bit real time transmission error check for high data integrity systems.\nDual full-duplex independent asynchronous receiver/transmitters\n256 character FIFOs for each receiver and transmitter\nPowers up to 9600 baud, 1 stop bit, no parity, 1 stop bit, interrupt disabled, all I/O set to input.\nPin programming to 68K or 80xxx bus interface\nThree character recognition system per channel, used as: General purpose character recognition\nXon/Xoff character recognition\nAddress recognition Wake up (multi-drop or '9 bit') mode\nSystem provides 4 levels of automation on a recognition event\nProgrammable data format 5 to 8 data bits plus parity and 9 bit mode\nOdd, even, no parity or force parity\n9/16,1, 1.5 or 2 stop bits\n16-bit programmable Counter/Timer\nProgrammable baud rate for each receiver and transmitter selectable from: 27 fixed rates: 50 to 2.0 Meg baud (includes MIDI? rate)\nOther baud rates via external clocks and C/T\nProgrammable user-defined rates derived from a programmable Counter/timer\nExternal 1X or 16X clock\nParity, framing, and overrun error detection\nLine break detection and generation; false start bit detection\nProgrammable channel mode Normal (full-duplex)\nAutomatic echo\nLocal loop back\nRemote loop back\nMulti-drop mode (also called 'wake-up' or '9-bit')\nMulti-function 8 bit I/O input port per channel loosely assigned to each channel. Can serve as clock or control inputs\nChange of state detection on eight inputs\nInputs have typically >100 M Ω pull-up resistors\nModem and DMA interface\nVersatile arbitrating interrupt system Interrupt system totally supports 'single query' polling\nOutput port can be configured to provide a total of up to six separate interrupt type outputs that may be wire-ORed (switched to open drain).\nEach FIFO can be independently programmed for any of 256 interrupt levels\nWatch dog timer for each receiver\nMaximum data transfer rates: 1X - 3 Mb/sec, 16X - 2 Mb/sec\nAutomatic wake-up mode for multi-drop applications\nStart-end break interrupt/status\nDetects break which originates in the middle of a character\nOn-chip crystal oscillator\nPower down mode at less than 10 ua\nReceiver time-out mode\nSingle +3.3V or +5V power supply\n;

The 28L202 is a high performance dual UART. Its functional and programming features closely match but greatly extend those of previous Philips dual channel UARTs. Its configuration on power up is similar that of the SC26C92. Its differences from the SC26C92 are: 256-character receiver, 256 character transmit FIFOs, 3 V and 5 V compatibility, 8 I/O ports for each UART-16 total, arbitrating interrupt system and overall faster bus and data speeds. It is fabricated in an advanced 0.5 micron CMOS process.\nIt is a member of the IMPACT?line of Data Communications parts\nPin programming will allow the device to operate with either the Motorola or Intel bus interface by changing the function of some pins (reset is inverted, DACKN, and IACKN enabled for example).\nThe Philips Semiconductors 28L202 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package. It interfaces directly with microprocessors and may be used in a polled or interrupt driven system. The use of the Interrupt system provides intelligent interrupt vectors.\nThe operating mode and data format of each channel may be programmed independently. Additionally, each receiver and transmitter can select its operating speed as one of twenty-seven fixed baud rates; a 16X clock derived from one of two programmable counter/timers, or an external 1X or 16X clock. The baud rate generator and counter/timer can operate directly from a crystal or from external clock inputs. The ability to independently program the operating speed of the receiver and transmitter make the DUART particularly attractive for dual-speed channel applications such as clustered terminal systems and bridges.\nEach receiver and transmitter is buffered by 256 character FIFOs to nearly eliminate the potential of receiver overrun, transmitter underrun and to reduce interrupt overhead in interrupt driven systems. In addition, a flow control capability (Xon/Xoff and RTS/CTS) is provided to disable a remote transmitter when the receiver buffer is full.\nAlso provided on the 28L202 is a multipurpose 8-bit I/O for each channel. These can be used as general-purpose I/O ports or can be assigned specific functions (such as clock inputs or status and interrupt outputs) under program control. Normally they will be used for modem control and DMA interface. All ports have change of state detectors and input sections are always active making output signals available to the internal circuits and the control processor.\nThe 28L202 is available in a 52-pin TSSOP package. For other package options, contact Philips.\n

SC28L202A1

Dualuniversalasynchronousreceiver/transmitterDUART

DESCRIPTION The28L202isahighperformancedualUART.ItsfunctionalandprogrammingfeaturescloselymatchbutgreatlyextendthoseofpreviousPhilipsdualchannelUARTs.ItsconfigurationonpowerupissimilarthatoftheSC26C92.ItsdifferencesfromtheSC26C92are:256–characterreceiver

SC28L202A1B

Dualuniversalasynchronousreceiver/transmitterDUART

DESCRIPTION The28L202isahighperformancedualUART.ItsfunctionalandprogrammingfeaturescloselymatchbutgreatlyextendthoseofpreviousPhilipsdualchannelUARTs.ItsconfigurationonpowerupissimilarthatoftheSC26C92.ItsdifferencesfromtheSC26C92are:256–characterreceiver

SC28L202A1D

Dualuniversalasynchronousreceiver/transmitterDUART

DESCRIPTION The28L202isahighperformancedualUART.ItsfunctionalandprogrammingfeaturescloselymatchbutgreatlyextendthoseofpreviousPhilipsdualchannelUARTs.ItsconfigurationonpowerupissimilarthatoftheSC26C92.ItsdifferencesfromtheSC26C92are:256–characterreceiver