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SC26C198C1A中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

SC26C198C1A
廠商型號(hào)

SC26C198C1A

功能描述

Octal UART with TTL compatibility at 3.3V and 5V supply voltages

文件大小

358.15 Kbytes

頁(yè)面數(shù)量

49 頁(yè)

生產(chǎn)廠商 Philips Semiconductors
企業(yè)簡(jiǎn)稱

PHI飛利浦

中文名稱

荷蘭皇家飛利浦

數(shù)據(jù)手冊(cè)

下載地址一下載地址二

更新時(shí)間

2025-7-16 11:29:00

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SC26C198C1A規(guī)格書詳情

DESCRIPTION

The Philips 26C198 Octal UART is a single chip CMOS–LSI communications device that provides 8 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in–band flow control using Xon/Xoff characters defined by the user and address recognition in the wake up mode. Synchronous bus interface is used for all communication between host and OCTART. It is fabricated using Philips 1.0 micron CMOS technology that combines the benefits of low cost, high density and low power consumption.

The operating speed of each receiver and transmitter can be selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate). The baud rate generator and counter can operate directly from a crystal or from seven other external or internal clock inputs. The ability to independently program the operating speed of the receiver and transmitter makes the Octal UART particularly attractive for dual speed full duplex channel applications such as clustered terminal systems. The receivers and transmitters are buffered with FIFOs of 16 characters to minimize the potential for receiver overrun and to reduce interrupt overhead. In addition, a handshaking capability and in–band flow control are provided to disable a remote UART transmitter when the receiver buffer is full or nearly so.

To minimize interrupt overhead an interrupt arbitration system is included which reports the context of the interrupting UART via direct access or through the modification of the interrupt vector. The context of the interrupt is reported as channel number, type of device interrupting ( receiver COS etc.) and, for transmitters or receivers, the fill level of the FIFO.

The Octal UART provides a power down mode in which the oscillator is stopped but the register contents are maintained. This results in reduced power consumption of several orders of magnitudes. The Octal UART is fully TTL compatible when operating from a single +5V power supply. Operation at 3.3 volts is maintained with CMOS interface levels.

The device also offered in a version which maintains TTL input and output levels while operating with a 3.3 volt power supply.

FEATURES

? Single 3.3v power supply

? Eight Philips industry standard full duplex UART channels

? Sixteen byte receiver FIFOs for each UART

? Sixteen byte transmit FIFOs for each UART

? In band flow control using programmable Xon/Xoff characters

? Flow control using CTSN RTSN hardware handshaking

? Automatic address detection in multi-drop mode

? Three byte general purpose character recognition

? Fast data bus, 30 ns data bus release time, 125 ns bus cycle time

? Programmable interrupt priorities

? Automatic identification of highest priority interrupt pending

? Global interrupt and control registers ease setup and interrupt handling

? Vectored interrupts with programmable interrupt vector formats

– Interrupt vector modified with channel number

– Interrupt vector modified with channel number and channel type

– Interrupt vector not modified

? IACKN and DACKN signal pins

? Watch dog timer for each receiver (64 receive clock counts)

? Programmable Data Formats:

– 5 to 8 data bits plus parity

– Odd, even force or no parity

– 1, 1.5 or 2 stop bits

? Flexible baud rate selection for receivers and transmitters:

– 22 fixed rates; 50 – 230.4K baud or 100 to 460.8K baud

– Additional non–standard rates to 500K baud with internal generators

– Two reload–counters provide additional programmable baud rate generation

– External 1x or 16x clock inputs

– Simplified baud rate selection

? 1 MHz 1x and 16x data rates full duplex all channels.

? Parity, framing and overrun error detection

? False start bit detection

? Line break detection and generation

? Programmable channel mode

– Normal(full duplex)

– Diagnostic modes

automatic echo

local loop back

emote loop back

? Four I/O ports per UART for modem controls, clocks, RTSN, I/O etc.

– All I/O ports equipped with ”Change of State Detectors”

? Two global inputs and two global outputs for general purpose I/O

? Power down mode

? On chip crystal oscillator, 2–8 MHz

? TTL input levels. Outputs switch between full VCC and VSS

? High speed CMOS technology

? 68 pin PLCC

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