描述 Description

The SC16C654B/654DB is a Quad Universal Asynchronous Receiver and Transmitter (QUART) used for serial data communications. Its principal function is to convert parallel data into serial data and vice versa. The UART can handle serial data rates up to 5 Mbit/s. It comes with an Intel or Motorola interface.
The SC16C654B/654DB is pin compatible with the ST16C654 and TL16C754 and it will power-up to be functionally equivalent to the 16C454. Programming of control registers enables the added features of the SC16C654B/654DB. Some of these added features are the 64-byte receive and transmit FIFOs, automatic hardware or software flow control and infrared encoding/decoding. The selectable auto-flow control feature significantly reduces software overload and increases system efficiency while in FIFO mode by automatically controlling serial data flow using RTS output and CTS input signals. The SC16C654B/654DB also provides DMA mode data transfers through FIFO trigger levels and the TXRDY and RXRDY signals. (TXRDY and RXRDY signals are not available in the HVQFN48 package.) On-board status registers provide the user with error indications, operational status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows on-board diagnostics.
The SC16C654B/654DB operates at 5 V, 3.3 V and 2.5 V, and the industrial temperature range, and is available in plastic PLCC68, LQFP64, HVQFN48 and LFBGA64 packages.
On the HVQFN48 package, only channel C has all the modem pins. Channel A and channel B have only RTS and CTS pins, and channel D does not have any modem pin.

特性 Features

4 channel UART
5 V, 3.3 V and 2.5 V operation
Industrial temperature range (-40 Cel to +85 Cel)
SC16C654B is pin and software compatible with the industry-standard ST16C454/554, ST16C654, ST68C454/554, TL16C554
SC16C654DB is pin and software compatible with ST16C654D, and software compatible with ST16C454/554, ST68C454/554, TL16C554
Up to 5 Mbit/s data rate at 5 V and 3.3 V and 3 Mbit/s at 2.5 V
5 V tolerant inputs
64-byte transmit FIFO
64-byte receive FIFO with error flags
Automatic software (Xon/Xoff)/hardware (RTS/CTS) flow control
Programmable Xon/Xoff characters
Software selectable baud rate generator
Four selectable Receive and Transmit FIFO interrupt trigger levels
Standard modem interface or infrared (IrDA) encoder/decoder interface
Sleep mode
Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break)
Transmit, Receive, Line Status, and Data Set interrupts independently controlled
Fully programmable character formatting: 5, 6, 7, or 8-bit characters
Even, Odd, or No Parity formats
1, 1 1/2 , or 2-stop bit
Baud generation (DC to 5 Mbit/s)
False start-bit detection
Complete status reporting capabilities
3-state output TTL drive capabilities for bi-directional data bus and control bus
Line break generation and detection
Internal diagnostic capabilities: Loop-back controls for communications link fault isolation
Prioritized interrupt system controls
Modem control functions (CTS, RTS, DSR, DTR, RI, CD).