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SAA7112

Decoder with High-Performance Scaler HPS for Image Port PELICAN

GENERALDESCRIPTION ThePELICANSAA7112isavideocapturedeviceforapplicationsattheimageportofVGAcontrollers. TheSAA7112isacombinationofatwochannelanalogpreprocessingcircuitincludingsource-selection,anti-aliasingfilterandADC,anautomaticclampandgaincontrol,a

SAA7112

Decoder with High-Performance Scaler (HPS) for Image Port (PELICAN); The PELICAN SAA7112 is a video capture device for application at the image port of a VGA controller, with following feature highlights:\nVideo Decoder\n? Six analog inputs, internal analog source selectors, (e.g. 6 × CVBS or(2 × YC and 2 × CVBS) or (1 × YC and 4 × CVBS)\n? Two analog preprocessing channels, including built in analog anti-alias filters\n? Fully programmable static gain for the main channels or Automatic Gain Control (AGC) for the selected CVBS/Y channel\n? Two 8 bit video CMOS Analog-to-Digital Converters (ADCs)\n? Automatic Clamp Control (ACC) for CVBS, Y and C\n? Switchable white peak control\n? On-chip line locked clock generation in accordance with CCIR-601\n? Digital PLL for synchronization and clock generation from all standards and non-standard video sources, e.g. consumer grade VTR\n? Requires only one crystal (32.11 MHz) for all standards\n? Horizontal and vertical sync detection\n? Automatic detection of 50/60Hz field frequency, and automatic switching between standards PAL and NTSC\n? Luminance and chrominance signal processing for PAL BGHI, PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43 and SECAM\n? User programmable luminance peaking or aperture correction\n? Cross-colour reduction for NTSC by chrominance combination filtering\n? PAL delay line for correcting PAL phase errors\n? Real time status information output (RTCO)\n? Independent Brightness Contrast Saturation (BCS) adjustment for decoder part.Video Scaler\n? Horizontal and vertical down-scaling and up-scaling to randomly sized windows\n? Horizontal and vertical scaling range: 2 (zoom) to 1?64 (icon); vertical zoom might be restricted\n? Anti-alias- and accumulating filter for horizontal scaling\n? Vertical scaling with linear phase interpolation (6-bit phase accuracy) and accumulating filter for anti-aliasing\n? Horizontal phase correct up- and down-scaling for improved signal quality of scaled data, especially for compression and video phone applications, with 6-bit phase accuracy\n? Two independent programming sets for scaler part, to define two ‘ranges’ per field or per frame\n? Field-wise switching between decoder-part and expansion port input\n? Brightness, contrast and saturation controls for scaled outputs.VBI-data decoder and text slicer\n? versatile VBI-data decoder, slicer, clock regeneration and byte synchronization; e.g. for WST, NABST, Close Caption, WSS, etc.Audio clock generation\n? Generation of a field locked audio master clock to support a constant number of audio clocks per video field\n? Generation of an audio serial and left/right (channel) clock signal.Digital I/O interfaces\n? Real time signal port (R-port), including continuous line locked reference clock and real time status information\n? Bidirectional expansion port (X-port) with half duplex functionality (D1), 8-bit YUV\n?? – output from decoder part, real time, or\n?? – input to scaler part, e.g. video from MPEG-decoder\n? Video image port (I-port) configurable for 8-bit (16-bit) data in master mode (own clock), or slave mode (external clock), with auxiliary timing and hand shake signals\n? 8-bit data Host port (H-port) for 16-bit extension of I-port\n? Discontinuous data streams supported\n? 32-word × 4 bytes FIFO register for video output data\n? 16-word × 4 bytes FIFO register for decoded VBI output data Scaled 4 : 2 : 2, 4 : 1 : 1 YUV output\n? Scaled 8-bit luminance only and raw data output\n? Decoded VBI data output.?;

GENERAL DESCRIPTION\nThe PELICAN SAA7112 is a video capture device for applications at the image port of VGA controllers.\nThe SAA7112 is a combination of a two channel analog preprocessing circuit including source-selection, anti-aliasing filter and ADC, an automatic clamp and gain control, a Clock Generation Circuit (CGC), a digital multistandard decoder and a SAA7140B based scaler, including variable horizontal and vertical up and down scaling and a brightness, contrast and saturation control circuit (see Fig.1).FEATURES\nThe PELICAN SAA7112 is a video capture device for application at the image port of a VGA controller, with following feature highlights:\nVideo Decoder\n? Six analog inputs, internal analog source selectors, (e.g. 6 × CVBS or(2 × YC and 2 × CVBS) or (1 × YC and 4 × CVBS)\n? Two analog preprocessing channels, including built in analog anti-alias filters\n? Fully programmable static gain for the main channels or Automatic Gain Control (AGC) for the selected CVBS/Y channel\n? Two 8 bit video CMOS Analog-to-Digital Converters (ADCs)\n? Automatic Clamp Control (ACC) for CVBS, Y and C\n? Switchable white peak control\n? On-chip line locked clock generation in accordance with CCIR-601\n? Digital PLL for synchronization and clock generation from all standards and non-standard video sources, e.g. consumer grade VTR\n? Requires only one crystal (32.11 MHz) for all standards\n? Horizontal and vertical sync detection\n? Automatic detection of 50/60Hz field frequency, and automatic switching between standards PAL and NTSC\n? Luminance and chrominance signal processing for PAL BGHI, PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43 and SECAM\n? User programmable luminance peaking or aperture correction\n? Cross-colour reduction for NTSC by chrominance combination filtering\n? PAL delay line for correcting PAL phase errors\n? Real time status information output (RTCO)\n? Independent Brightness Contrast Saturation (BCS) adjustment for decoder part.Video Scaler\n? Horizontal and vertical down-scaling and up-scaling to randomly sized windows\n? Horizontal and vertical scaling range: 2 (zoom) to 1?64 (icon); vertical zoom might be restricted\n? Anti-alias- and accumulating filter for horizontal scaling\n? Vertical scaling with linear phase interpolation (6-bit phase accuracy) and accumulating filter for anti-aliasing\n? Horizontal phase correct up- and down-scaling for improved signal quality of scaled data, especially for compression and video phone applications, with 6-bit phase accuracy\n? Two independent programming sets for scaler part, to define two ‘ranges’ per field or per frame\n? Field-wise switching between decoder-part and expansion port input\n? Brightness, contrast and saturation controls for scaled outputs.VBI-data decoder and text slicer\n? versatile VBI-data decoder, slicer, clock regeneration and byte synchronization; e.g. for WST, NABST, Close Caption, WSS, etc.Audio clock generation\n? Generation of a field locked audio master clock to support a constant number of audio clocks per video field\n? Generation of an audio serial and left/right (channel) clock signal.Digital I/O interfaces\n? Real time signal port (R-port), including continuous line locked reference clock and real time status information\n? Bidirectional expansion port (X-port) with half duplex functionality (D1), 8-bit YUV\n?? – output from decoder part, real time, or\n?? – input to scaler part, e.g. video from MPEG-decoder\n? Video image port (I-port) configurable for 8-bit (16-bit) data in master mode (own clock), or slave mode (external clock), with auxiliary timing and hand shake signals\n? 8-bit data Host port (H-port) for 16-bit extension of I-port\n? Discontinuous data streams supported\n? 32-word × 4 bytes FIFO register for video output data\n? 16-word × 4 bytes FIFO register for decoded VBI output data Scaled 4 : 2 : 2, 4 : 1 : 1 YUV output\n? Scaled 8-bit luminance only and raw data output\n? Decoded VBI data output.

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