描述 Description

1 FEATURES
? Four analog inputs, internal analog source selectors,
e.g. 4×CVBS or 2×Y/C or (1×Y/C and 2×CVBS)
? Two analog preprocessing channels
? Fully programmable static gain for the main channels or
automatic gain control for the selected CVBS or Y/C
channel
? Switchable white peak control
? Two built-in analog anti-aliasing filters
? Two 8-bit video CMOS analog-to-digital converters
(ADCs)
? On-chip clock generator
? Line-locked system clock frequencies
? Digital PLL for H-sync processing and clock generation
? Requires only one crystal (24.576 MHz) for all standards
? Horizontal and vertical sync detection

特性 Features

? Four analog inputs, internal analog source selectors,
e.g. 4×CVBS or 2×Y/C or (1×Y/C and 2×CVBS)
? Two analog preprocessing channels
? Fully programmable static gain for the main channels or
automatic gain control for the selected CVBS or Y/C
channel
? Switchable white peak control
? Two built-in analog anti-aliasing filters
? Two 8-bit video CMOS analog-to-digital converters
(ADCs)
? On-chip clock generator
? Line-locked system clock frequencies
? Digital PLL for H-sync processing and clock generation
? Requires only one crystal (24.576 MHz) for all standards
? Horizontal and vertical sync detection