描述 Description

The RTL8201EN-VC-GR is a single-chip/single-port 10/100Mbps Ethernet PHYceiver that supports: MII (Media Independent Interface) RMII (Reduced Media Independent Interface) SNI (Serial Network Interface)
The RTL8201EN implements all 10/100M Ethernet Physical-layer functions including the Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), with an auto MDIX function, 10Base-Tx Encoder/Decoder, and Twisted-Pair Media Access Unit (TPMAU).
A PECL (Pseudo Emitter Coupled Logic) interface is supported to connect with an external 100Base-FX fiber optical transceiver. The chip utilizes an advanced CMOS process to meet low voltage and low power requirements. With on-chip DSP (Digital Signal Processing) technology, the chip provides excellent performance under all operating conditions.

特性 Features

Supports MII and 7-wire SNI (Serial Network Interface)
Supports RMII mode
10/100Mbps operation
Full/half duplex operation
Twisted pair or fiber mode output
Auto-Negotiation
Supports power down mode
Supports operation under Link Down Power Saving mode
Supports Base Line Wander (BLW) compensation
Supports auto MDIX
Supports repeater mode
Supports Interrupt function
Adaptive Equalization
Network status LEDs
Flow control support
25MHz crystal/oscillator as clock source
IEEE 802.3/802.3u compliant
Low power supply, 1.2V, and 3.3V; 1.2V is generated by an internal regulator
0.11μm CMOS process
48-pin QFN ‘Green’ package