描述 Description

The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins. The device gives customers both cost and space savings by eliminating external components and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs. The PLL1707 is ideal for MPEG-2 applications that use a 27-MHz master clock such as DVD recorders, HDD recorders, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes.

特性 Features

? Qualified for Automotive Applications
? 27-MHz Master Clock Input
? Generated Audio System Clock
- SCKO0: 768 fS (fS = 44.1 kHz)
? SCKO1: 768 fS, 512 fS (fS = 48 kHz)
? SCKO2: 256 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz)
? SCKO3: 384 fS (fS = 32, 44.1, 48, 64, 88.2, 96 kHz)
? Zero PPM Error Output Clocks
? Low Clock Jitter: 50 ps (Typical)
? Multiple Sampling Frequencies:fS = 32, 44.1, 48, 64, 88.2, 96 kHz
? 3.3-V Single Power Supply
? Parallel Control
? Package: 20-Pin SSOP (150 mil), Lead-Free Product
? APPLICATIONS
- HDD + DVD Recorders
? DVD Recorders
? HDD Recorders
? DVD Players
? DVD Add-On Cards for Multimedia PCs
? Digital HDTV Systems
? Set-Top Boxes