描述 Description

The PL123E-05 (-05H for High Drive) is a high per-formance, low skew, low jitter zero delay buffer designed to distribute high speed clocks. It has five low-skew outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±100ps, the device acts as a zero delay buffer. The input output propagation delay can be advanced or delayed by adjusting the load on the CLKOUT pin.These parts are not intended for 5V input-tolerant applications.

特性 Features

? Frequency Range 10MHz to 220MHz
? Zero input - output delay
? Low output-to-output skew
? Optional Drive Strength:
? Standard (8mA) PL123E-05
? High (12mA) PL123E-05H
? 2.5V or 3.3V ±10% operation
? Available in 8-pin SOP packaging

簡介

PL123E-05屬于集成電路（IC）的時鐘發(fā)生器PLL頻率合成器。由制造生產(chǎn)的PL123E-05時鐘發(fā)生器，PLL，頻率合成器時鐘發(fā)生器、PLL 和頻率合成器集成電路 (IC) 可為邏輯器件提供參考信號的穩(wěn)定定時脈沖，這些器件包括計算機、微控制器、數(shù)據(jù)通信系統(tǒng)和圖形/視頻發(fā)生器。這些集成電路可能包括緩沖器、驅(qū)動器、分頻器、倍頻器、多路復(fù)用器、合成器、扇出分配器和預(yù)分頻器。