PKD01AY中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書
PKD01AY規(guī)格書詳情
GENERAL DESCRIPTION
The PKD01 tracks an analog input signal until a maximum amplitude is reached. The maximum value is then retained as a peak voltage on a hold capacitor. Being a monolithic circuit, the PKD01 offers significant performance and package density advantages over hybrid modules and discrete designs without sacrificing system versatility. The matching characteristics attained in a monolithic circuit provide inherent advantages when charge injection and droop rate error reduction are primary goals.
FEATURES
Monolithic Design for Reliability and Low Cost
High Slew Rate: 0.5 V/μs
Low Droop Rate
TA = 25°C: 0.1 mV/ms
TA = 125°C: 10 mV/ms
Low Zero-Scale Error: 4 mV
Digitally Selected Hold and Reset Modes
Reset to Positive or Negative Voltage Levels
Logic Signals TTL and CMOS Compatible
Uncommitted Comparator On-Chip
Available in Die Form
產(chǎn)品屬性
- 型號：
PKD01AY
- 制造商：
Analog Devices
- 功能描述：
Sample and Hold 2-CH 70us 14-Pin CDIP
- 功能描述：
Mounting
- Type：
Surface Mount
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
ADI(亞德諾) |
24+ |
NA/ |
8735 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價 | ||
AD |
24+ |
cdip |
80000 |
只做自己庫存 全新原裝進口正品假一賠百 可開13%增 |
詢價 | ||
AD |
10+ |
DIP |
3000 |
原裝現(xiàn)貨價格有優(yōu)勢量多可發(fā)貨 |
詢價 | ||
ADI(亞德諾) |
24+/25+ |
10000 |
原裝正品現(xiàn)貨庫存價優(yōu) |
詢價 | |||
AD |
1035+ |
CDIP |
14 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
原裝 |
專業(yè)鐵帽 |
CDIP |
67500 |
鐵帽原裝主營-可開原型號增稅票 |
詢價 | ||
ADI |
2430+ |
CDIP |
8540 |
只做原裝正品假一賠十為客戶做到零風(fēng)險!! |
詢價 | ||
原廠 |
NA |
8650 |
一級代理 原裝正品假一罰十價格優(yōu)勢長期供貨 |
詢價 | |||
ADI |
2025+ |
DIP |
3485 |
全新原裝、公司現(xiàn)貨熱賣 |
詢價 | ||
AD |
23+ |
原廠原包 |
19960 |
只做進口原裝 終端工廠免費送樣 |
詢價 |
