Features ? High Performance PCI Express Switch

— Ten 5 Gbps Gen2 PCI Express lanes

— Four switch ports

– One x4 upstream port

– Three x2 downstream ports

— Low latency cut-through switch architecture

— Support for Max Payload Size up to 2048 bytes

— One virtual channel

— Eight traffic classes

— PCI Express Base Specification Revision 2.0 compliant

? Flexible Architecture with Numerous Configuration Options

— Automatic per port link width negotiation to x4, x2 or x1

— Automatic lane reversal on all ports

— Automatic polarity inversion

— Ability to load device configuration from serial EEPROM

Legacy Support

— PCI compatible INTx emulation

— Bus locking

? Highly Integrated Solution

— Incorporates on-chip internal memory for packet buffering and

queueing

— Integrates ten 5 Gbps embedded SerDes with 8b/10b

encoder/decoder (no separate transceivers needed)

– Receive equalization (RxEQ)

? Reliability, Availability, and Serviceability (RAS) Features

— Internal end-to-end parity protection on all TLPs ensures data

integrity even in systems that do not implement end-to-end

CRC (ECRC)

— Supports ECRC and Advanced Error Reporting

— Supports PCI Express Native Hot-Plug, Hot-Swap capable

I/O

— Compatible with Hot-Plug I/O expanders used on PC motherboards

— Supports Hot-Swap