首頁 >PCA9698DGG>規(guī)格書列表
零件型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
---|---|---|---|---|
PCA9698DGG | 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT; 1 MHz Fast-mode Plus I2C-bus serial interface\nCompliant with I2C-bus Fast-mode (400 kHz) and Standard-mode (100 kHz)\n2.3 V to 5.5 V operation with 5.5 V tolerant I/Os\n40 configurable I/O pins that default to inputs at power-up\nOutputs: Programmable totem-pole (10 mA source, 25 mA sink) or open-drain (25 mA sink) with controlled edge rate output structure. Default to totem-pole on power-up.\nActive LOW Output Enable (OE) input pin 3-states all outputs. Polarity can be programmed to active HIGH through the I2C-bus. Defaults to OE on power-up.\nOutput state change programmable on the Acknowledge or the STOP Command to update outputs byte-by-byte or all at the same time respectively. Defaults to Acknowledge on power-up.\nInputs: Open-drain active LOW Interrupt (INT) output pin allows monitoring of logic level change of pins programmed as inputs\nProgrammable Interrupt Mask Control for input pins that do not require an interrupt when their states change\nPolarity Inverter register allows inversion of the polarity of the I/O pins when read\nActive LOW SMBus Alert (SMBALERT) output pin allows to initiate SMBus 'Alert Response Address' sequence. Own slave address sent when sequence initiated.\nActive LOW Reset (RESET) input pin resets device to power-up default state\nGPIO All Call address allows programming of more than one device at the same time with the same parameters\n64 programmable slave addresses using 3 address pins\nReadable Device ID (manufacturer, device type and revision)\nDesigned for live insertion in PICMG applications Minimize line disturbance (IOFF and power-up 3-state)\nSignal transient rejection (50 ns noise filter and robust I2C-bus state machine)\nLow standby current\n-40 Cel to +85 Cel operation\nESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101\nLatch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA\nPackages offered: TSSOP56, and HVQFN56\n; The PCA9698 provides 40-bit parallel input/output (I/O) port expansion for I2C-busapplications organized in 5 banks of 8 I/Os. At 5 V supply voltage, the outputs arecapable of sourcing 10 mA and sinking 25 mA with a total package load of 1 A to allowdirect driving of 40 LEDs. Any of the 40 I/O ports can be configured as an input oroutput.\nThe PCA9698 is the first GPIO device in a new Fast-mode Plus (Fm+) family.Fm+ devices offer higher frequency (up to 1 MHz) and longer, more densely populated busoperation (up to 4000 pF).\nThe device is fully configurable: output ports can beprogrammed to be totem-pole or open-drain and logic states can change at either theAcknowledge (bank change) or the Stop Command (global change), each input port can be maskedto prevent it from generating interrupts when its state changes, I/O data logic state can beinverted when read by the system master. \nAn open-drain interrupt output pin (INT) allows monitoring of the input pins and is assertedeach time a change occurs in one or several input ports (unless masked).\nTheOutput Enable pin (OE) 3-states any I/O selected as outputand can be used as an input signal to blink or dim LEDs (PWM with frequency > 80 Hzand change duty cycle).\nA 'GPIO All Call' command allows to program multipleAdvanced GPIOs at the same time even if they have different I2C-bus addresses. Thisallows optimal code programming when more than one device needs to be programmed withthe same instruction or if all outputs need to be turned on or off at the same time (forexample, LED test).\nThe Device ID, hard coded in the PCA9698, allows the systemmaster to read manufacturer, part type and revision information.\nThe SMBus Alertfeature allows the SMBALERT pins of multiple devices with thisfeature to be connected together to form a wired-AND signal and to be used inconjunction with the SMBus Alert Response Address.\nThe internal Power-On Reset(POR) or hardware reset pin (RESET) initializes the 40 I/Os asinputs. Three address select pins configure one of 64 slave addresses.\nThe PCA9698is available in 56-pin TSSOP and HVQFN packages and is specified over the -40 Cel to +85Cel industrial temperature range.\n | 恩XP | 恩XP | |
PCA9698DGG | 40-bit Fm I2C-bus advanced I/O port with RESET, OE and INT | PHIPhilips Semiconductors 飛利浦荷蘭皇家飛利浦 | PHI | |
PCA9698DGG | 40-bit Fm I2C-bus advanced I/O port with RESET, OE and INT | ETC | ETC | |
MetricErgonomicPlugs | HeycoHeyco. ???/span> | Heyco | ||
UltrafastTTLComparators GENERALDESCRIPTION TheAD9696andAD9698areultrafastTTL-compatiblevoltagecomparatorsabletoachievepropagationdelayspreviouslypossibleonlyinhighperformanceECLdevices.TheAD9696is asinglecomparatorproviding4.5nspropagationdelay,200psmaximumdelaydispersionand1.7n | ADAnalog Devices 亞德諾亞德諾半導體技術有限公司 | AD | ||
UltrafastTTLComparators GENERALDESCRIPTION TheAD9696andAD9698areultrafastTTL-compatiblevoltagecomparatorsabletoachievepropagationdelayspreviouslypossibleonlyinhighperformanceECLdevices.TheAD9696is asinglecomparatorproviding4.5nspropagationdelay,200psmaximumdelaydispersionand1.7n | ADAnalog Devices 亞德諾亞德諾半導體技術有限公司 | AD | ||
UltrafastTTLComparators GENERALDESCRIPTION TheAD9696andAD9698areultrafastTTL-compatiblevoltagecomparatorsabletoachievepropagationdelayspreviouslypossibleonlyinhighperformanceECLdevices.TheAD9696is asinglecomparatorproviding4.5nspropagationdelay,200psmaximumdelaydispersionand1.7n | ADAnalog Devices 亞德諾亞德諾半導體技術有限公司 | AD | ||
UltrafastTTLComparators GENERALDESCRIPTION TheAD9696andAD9698areultrafastTTL-compatiblevoltagecomparatorsabletoachievepropagationdelayspreviouslypossibleonlyinhighperformanceECLdevices.TheAD9696is asinglecomparatorproviding4.5nspropagationdelay,200psmaximumdelaydispersionand1.7n | ADAnalog Devices 亞德諾亞德諾半導體技術有限公司 | AD | ||
UltrafastTTLComparators GENERALDESCRIPTION TheAD9696andAD9698areultrafastTTL-compatiblevoltagecomparatorsabletoachievepropagationdelayspreviouslypossibleonlyinhighperformanceECLdevices.TheAD9696is asinglecomparatorproviding4.5nspropagationdelay,200psmaximumdelaydispersionand1.7n | ADAnalog Devices 亞德諾亞德諾半導體技術有限公司 | AD | ||
DVK-2QuickStartGuide DVK?2Introduction DVK?2Base?kit TheDVK?2isdesignedasquickstartsolutionforthedevelopment ofapplicationswithAXmicro?controllersandradio?chips.The DVK?2base?kitisthedevelopmentplatformforapplicationsbased ontheAX8052F1xxmicro?controllerfamily.Withtheavailablera | ONSEMION Semiconductor 安森美半導體安森美半導體公司 | ONSEMI |
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
恩XP |
24+ |
TSSOP-56 |
2524 |
原裝正品,現(xiàn)貨庫存,1小時內發(fā)貨 |
詢價 | ||
恩XP |
25+ |
TSSOP-56 |
32360 |
NXP/恩智浦全新特價PCA9698DGG即刻詢購立享優(yōu)惠#長期有貨 |
詢價 | ||
恩XP |
24+ |
TSSOP56 |
140 |
只做原廠渠道 可追溯貨源 |
詢價 | ||
恩XP |
23+ |
N/A |
12000 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
恩XP |
2023+ |
- |
4550 |
全新原裝正品 |
詢價 | ||
恩XP |
24+ |
- |
8721 |
只做原裝現(xiàn)貨假一罰十!價格最低!只賣原裝現(xiàn)貨 |
詢價 | ||
恩XP |
23+ |
TSSOP56 |
12500 |
只做進口原裝假一罰百 |
詢價 | ||
恩XP |
2024+ |
N/A |
70000 |
柒號只做原裝 現(xiàn)貨價秒殺全網 |
詢價 | ||
恩XP |
24+ |
- |
17048 |
原廠可訂貨,技術支持,直接渠道??珊灡9┖贤?/div> |
詢價 | ||
恩XP |
25+ |
TSSOP56 |
4500 |
全新原裝正品支持含稅 |
詢價 |
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