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P89LPC935

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters

Generaldescription TheP89LPC933/934/935/936isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshavebeen

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P89LPC935

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

Generaldescription TheP89LPC933/934/935/936isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshavebeen

ETC

P89LPC935

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/16 kB 3 V byte-erasable Flash with 8-bit ADCs

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P89LPC9351

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

Generaldescription TheP89LPC9331/9341/9351/9361isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshaveb

ETC

P89LPC9351FA

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

Generaldescription TheP89LPC9331/9341/9351/9361isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshaveb

ETC

P89LPC9351FA

8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

Generaldescription TheP89LPC9331/9341/9351/9361isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshaveb

ETC

P89LPC9351FDH

8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 8-bit ADC

Generaldescription TheP89LPC9331/9341/9351/9361isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshaveb

ETC

P89LPC9351FDH

8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs

Generaldescription TheP89LPC9331/9341/9351/9361isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshaveb

ETC

P89LPC9351FDH

8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs; 2.1 Principal features\n4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.\n256-byte RAM data memory. P89LPC9351 and P89LPC9361 also include a 512-byte auxiliary on-chip RAM.\n512-byte customer data EEPROM on-chip allows serialization of devices, storage of setup parameters, etc. (P89LPC9351/9361)\nDual 4-input multiplexed 8-bit ADC/DAC outputs. Two analog comparators with selectable inputs and reference source.\nDual Programmable Gain Amplifiers (PGA) with selectable gains of 2x, 4x, 8x, or 16x can be applied to ADCs and analog comparator inputs. (P89LPC9351/9361)\nOn-chip temperature sensor integrated with ADC module.\nTwo 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).\nA 23-bit system timer that can also be used as a real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.\nEnhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port and SPI communication port.\nCapture/Compare Unit (CCU) provides PWM, input capture, and output compare functions. (P89LPC9351/9361)\n2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).\nEnhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.\n28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.\n2.2 Additional features\nA high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI.\nSerial flash In-Circuit Programming (ICP) allows simple production coding with commercial EPROM programmers. Flash security bits prevent reading of sensitive application programs.\nSerial flash In-System Programming (ISP) allows coding while the device is mounted in the end application.\nIn-Application Programming (IAP) of the flash code memory. This allows changing the code in a running application.\nWatchdog timer with separate on-chip oscillator, nominal 400 kHz, calibrated to ±5 %, requiring no external components. The watchdog prescaler is selectable from eight values.\nHigh-accuracy internal RC oscillator option, with clock doubler option, allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.\nClock switching on the fly among internal RC oscillator, watchdog oscillator, external clock source provides optimal support of minimal power active mode with fast switching to maximum performance.\nIdle and two different power-down reduced power modes. Improved wake-up from Power-down mode (a LOW interrupt input starts execution). Typical power-down current is 1 μA (total power-down with voltage comparators disabled).\nActive-LOW reset. On-chip power-on reset allows operation without external reset components. A software reset function is also available.\nConfigurable on-chip oscillator with frequency range options selected by user programmed flash configuration bits. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 18 MHz.\nOscillator fail detect. The watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function.\nProgrammable port output configuration options: quasi-bidirectional, open drain, push-pull, input-only.\nHigh current sourcing/sinking (20 mA) on eight I/O pins (P0.3 to P0.7, P1.4, P1.6, P1.7). All other port pins have high sinking capability (20 mA). A maximum limit is specified for the entire chip.\nPort ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of the pins match or do not match a programmable pattern.\nControlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times.\nOnly power and ground connections are required to operate the P89LPC9331/9341/9351/9361 when internal reset option is selected.\nFour interrupt priority levels.\nEight keypad interrupt inputs, plus two additional external interrupt inputs.\nSchmitt trigger port inputs.\nSecond data pointer.\nEmulation support.\n;

Overview The P89LPC9331/9341/9351/9361 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC9331/9341/9351/9361 in order to reduce component count, board space, and system cost.\n

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P89LPC935FA

8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters

Generaldescription TheP89LPC933/934/935/936isasingle-chipmicrocontroller,availableinlowcostpackages,basedonahighperformanceprocessorarchitecturethatexecutesinstructionsintwotofourclocks,sixtimestherateofstandard80C51devices.Manysystem-levelfunctionshavebeen

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