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NPIC6C596PW-Q100數(shù)據(jù)手冊(cè)集成電路(IC)的移位寄存器規(guī)格書(shū)PDF

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廠(chǎng)商型號(hào)

NPIC6C596PW-Q100

參數(shù)屬性

NPIC6C596PW-Q100 封裝/外殼為16-TSSOP(0.173",4.40mm 寬);包裝為管件;類(lèi)別為集成電路(IC)的移位寄存器;產(chǎn)品描述:IC SHIFT REGISTER 8BIT 16TSSOP

功能描述

Power logic 8-bit shift register; open-drain outputs

封裝外殼

16-TSSOP(0.173",4.40mm 寬)

制造商

Nexperia Nexperia B.V. All rights reserved

中文名稱(chēng)

安世 安世半導(dǎo)體(中國(guó))有限公司

數(shù)據(jù)手冊(cè)

下載地址下載地址二

更新時(shí)間

2025-8-8 20:00:00

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NPIC6C596PW-Q100規(guī)格書(shū)詳情

描述 Description

The NPIC6C596-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and open-drain outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR resets both the shift register and storage register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. To provide additional hold time in cascaded applications, the serial output QS7 is clocked out on the falling edge of SHCP. Data in the storage register drives the gate of the output extended-drain NMOS (EDNMOS) transistor whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers.
The open-drain outputs are 33 V/100 mA continuous current extended-drain NMOS transistors designed for use in systems that require moderate load power such as LEDs. Integrated voltage clamps in the outputs provide protection against inductive transients making the device suitable for power driver applications such as relays, solenoids and other low-current or medium-voltage loads.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性 Features

? Automotive product qualification in accordance with AEC-Q100 (Grade 1)
? Specified from -40 °C to +125 °C

? Low RDSon
? Eight Power EDNMOS transistor outputs of 100 mA continuous current
? 250 mA current limit capability
? Output clamping voltage 33 V
? 30 mJ avalanche energy capability
? Enhanced cascading for multiple stages
? All registers cleared with single input
? Low power consumption
? ESD protection:
? HBM AEC-Q100-002 revision D exceeds 2500 V
? CDM AEC-Q100-011 revision B exceeds 1000 V

應(yīng)用 Application

? LED sign
? Graphic status panel
? Fault status indicator

技術(shù)參數(shù)

  • 制造商編號(hào)

    :NPIC6C596PW-Q100

  • 生產(chǎn)廠(chǎng)家

    :Nexperia

  • Product status

    :Production

  • V_CC (V)

    :4.5 - 5.5

  • Logic switching levels

    :CMOS

  • Output drive capability (mA)

    :100

  • t_pd (ns)

    :90

  • f_max (MHz)

    :10

  • Power dissipation considerations

    :low

  • T_amb (Cel)

    :-40~125

  • R_th(j-a) (K/W)

    :119

  • Ψ_th(j-top) (K/W)

    :3.0

  • R_th(j-c) (K/W)

    :47

  • Package name

    :TSSOP16

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恩XP
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NA/
8735
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SO-16
30000
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SO-16
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SO-16
8080
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22+
SOT403-1
25000
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TSSOP
9000
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7800
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24+
16-TSSOP
56200
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恩XP
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8080
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N/A
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