描述 Description

The NBSG16M is a differential current mode logic (CML) receiver/driver. The device is functionally equivalent to the EP16, LVEP16, or SG16 devices with CML output structure and lower EMI capabilities.Inputs incorporate internal 50 Ω termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS, CML, or LVDS. The CML output structure contains internal 50 Ω source termination resistor to VCC. The device generates 400 mV output amplitude with 50 Ω receiver resistor to VCC.The VBB pin is internally generated voltage supply available to this device only. For all single?ended input conditions, the unused complementary differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB via a 0.01 μF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB output should be left open.

特性 Features

? Maximum Input Clock Frequency > 10 GHz Typical
? Maximum Input Data Rate > 10 Gb/s Typical
? 120 ps Typical Propagation Delay
? 35 ps Typical Rise and Fall Times
? Positive CML Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
? Negative CML Output with RSNECL or NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
? CML Output Level; 400 mV Peak-to-Peak Output with 50 _ Receiver Resistor to VCC
? 50 Ω Internal Input and Output Termination Resistors
? Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL and SG Devices
? VBB Reference Voltage Output
? Pb-Free Packages are Available

應用 Application

? Backplane buffering
? OC-3 through OC-192 clock or data distribution/driver
? Gigabit Ethernet clock or data driver
? Fibre Channel distribution/driver

簡介

NBSG16M屬于開發(fā)板套件編程器的評估演示板及套件。由制造生產(chǎn)的NBSG16M評估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過驗證的實施環(huán)境中評估某些重點器件的性能或特性。評估方法通常有完善的文檔說明，并且視乎具體情況由評估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對于數(shù)量特別多或類別獨特的器件類別(如 ADC、DAC 和開關模式電源)，評估平臺可組合為一個單獨的產(chǎn)品系列。