MX29LV800CTTI-70屬于集成電路（IC）的存儲器。由旺宏電子股份有限公司制造生產(chǎn)的MX29LV800CTTI-70存儲器存儲器是集成電路上用作數(shù)據(jù)存儲設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。

The MX29LV160C T/B product family has been discontinued. The MX29LV160C T/B product family is not recommended for new designs. The MX29LV160D T/B family is the recommended replacement. Please refer to MX29LV160D T/B datasheet for full specifications and ordering information, or contact your local sales representative for additional support

FEATURES

GENERAL FEATURES

? Byte/Word mode switchable:

- 524,288 x8 / 262,144 x16 (MX29LV400C)

- 1,048,576 x8 / 524,288 x16 (MX29LV800C)

- 2,097,152 x8 / 1,048,576 x16 (MX29LV160C)

? Sector Structure

- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1 64K-Byte x 7 (MX29LV400C), 64K-Byte x 15 (MX29LV800C), 64K-Byte x 31 (MX29LV160C)

- Provides sector protect function to prevent program or erase operation in the protected sector

- Provides chip unprotect function to allow code changing

- Provides temporary sector unprotect function for code changing in previously protected sector

? Single Power Supply Operation

- 2.7 to 3.6 volt for read, erase, and program operations

? Latch-up protected to 250mA from -1V to Vcc + 1V

? Low Vcc write inhibit : Vcc ≤ 1.4V

? Compatible with JEDEC standard

- Pinout and software compatible to single power supply Flash

? Functional compatible with MX29LV400B/MX29LV800B/MX29LV160B device

PERFORMANCE

? High Performance

- Fast access time: 45R (MX29LV400C and MX29LV800C only), 55R/70/90ns

- Fast program time: 7us/word typical utilizing accelerate function

- Fast erase time: 0.7s/sector, 15s/chip (typical, MX29LV160C)

? Low Power Consumption

- Low active read current: 10mA (typical) at 5MHz

- Low standby current: 200nA (typical)

? Minimum 100,000 erase/program cycle

? 20 years data retention

SOFTWARE FEATURES

? Erase Suspend/ Erase Resume

- Suspends sector erase operation to read data from or program data to another sector which is not being erased

? Status Reply

- Data# Polling & Toggle bits provide detection of program and erase operation completion

? Support Common Flash Interface (CFI)

HARDWARE FEATURES

? Ready/Busy# (RY/BY#) Output

- Provides a hardware method of detecting program and erase operation completion

? Hardware Reset (RESET#) Input

- Provides a hardware method to reset the internal state machine to read mode

PACKAGE

? 44-Pin SOP

? 48-Pin TSOP

? 48-Ball TFBGA

? 48-Ball LFBGA

? 48-Ball WFBGA

? 48-Ball XFLGA

? All devices are RoHS Compliant