描述 Description

The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2.048 MHz, 1.544 MHz, or 8 kHz input reference. The MT9042C is compliant with AT&T TR62411 Stratum 3, 4 and 4 Enhanced, and ETSI ETS 300 011. It will meet the jitter tolerance, jitter transfer, intrinsic jitter, frequency accuracy, holdover accuracy, capture range, phase slope and MTIE requirements for these specifications.

特性 Features

? Meets jitter requirements for: AT&T TR62411 Stratum 3, 4 and Stratum 4 Enhanced for DS1 interfaces; and for ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 for E1 interfaces
? Provides C1.5, C3, C2, C4, C8 and C16 output clock signals
? Provides 8 kHz ST-BUS framing signals
? Selectable 1.544 MHz, 2.048 MHz or 8 kHz input reference signals
? Accepts reference inputs from two independent sources
? Provides bit error free reference switching - meets phase slope and MTIE requirements
? Operates in either Normal, Holdover and Freerun modes

簡介

MT9042屬于集成電路（IC）的電信。由制造生產(chǎn)的MT9042電信電信接口集成電路 (IC) 為通信網(wǎng)絡(luò)接口提供特定功能和控制，例如以太網(wǎng)切換、線路驅(qū)動器、ISDN、放大器、通道擴展器、數(shù)字鎖相環(huán)、DTMF、音頻發(fā)生器和解碼器、回聲消除、檢測器和發(fā)生器、DDA、電話線路監(jiān)控器和主叫號碼標識。