描述 Description

The MPC9350 is a 2.5 V and 3.3 V compatible, PLL-based clock generator targeted for high performance clock distribution systems. With output frequencies of up to 200 MHz and maximum output skews of 150 ps, the MPC9350 is ideal for the most demanding clock tree designs. The device offers 9 low skew clock outputs, with each one configurable to support the clocking needs of the various high-performance microprocessors, including the PowerQUICC II integrated communication microprocessor. The extended temperature range of the MPC9350 supports telecommunication and networking requirements. The device employs a fully differential PLL design to minimize cycle-to-cycle and long-term jitter.

特性 Features

9 output LVCMOS PLL clock generator
25-200 MHz output frequency range
2.5 V and 3.3 V compatible
Compatible to various microprocessors such as PowerQuicc II
Supports networking, telecommunications and computer applications
Fully integrated PLL
Configurable outputs: divide-by-2, 4 and 8 of VCO frequency
Selectable output to input frequency ratio of 8:1, 4:1, 2:1 or 1:1
Oscillator or crystal reference inputs
Internal PLL feedback
Output disable
PLL enable/disable
Low skew characteristics: maximum 150 ps output-to-output
32-lead LQFP package
32-lead Pb-free Package Available
Temperature range ohm40°C to +85°C